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C8051F300 Datasheet(PDF) 57 Page - List of Unclassifed Manufacturers

Part # C8051F300
Description  Mixed Signal ISP Flash MCU Family
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C8051F300/1/2/3/4/5
Rev. 2.6
57
CIP-51 Instruction Set Summary, which includes the mnemonic, number of bytes, and number of clock
cycles for each instruction.
8.1.2. MOVX Instruction and Program Memory
The MOVX instruction is typically used to access external data memory (Note: the C8051F300/1/2/3/4/5
does not support external data or program memory). In the CIP-51, the MOVX instruction accesses the on-
chip program memory space implemented as re-programmable Flash memory. This feature provides a
mechanism for the CIP-51 to update program code and use the program memory space for non-volatile
data storage. Refer to Section “10. Flash Memory” on page 87 for further details.
Table 8.1. CIP-51 Instruction Set Summary
Mnemonic
Description
Bytes
Clock
Cycles
Arithmetic Operations
ADD A, Rn
Add register to A
1
1
ADD A, direct
Add direct byte to A
2
2
ADD A, @Ri
Add indirect RAM to A
1
2
ADD A, #data
Add immediate to A
2
2
ADDC A, Rn
Add register to A with carry
1
1
ADDC A, direct
Add direct byte to A with carry
2
2
ADDC A, @Ri
Add indirect RAM to A with carry
1
2
ADDC A, #data
Add immediate to A with carry
2
2
SUBB A, Rn
Subtract register from A with borrow
1
1
SUBB A, direct
Subtract direct byte from A with borrow
2
2
SUBB A, @Ri
Subtract indirect RAM from A with borrow
1
2
SUBB A, #data
Subtract immediate from A with borrow
2
2
INC A
Increment A
1
1
INC Rn
Increment register
1
1
INC direct
Increment direct byte
2
2
INC @Ri
Increment indirect RAM
1
2
DEC A
Decrement A
1
1
DEC Rn
Decrement register
1
1
DEC direct
Decrement direct byte
2
2
DEC @Ri
Decrement indirect RAM
1
2
INC DPTR
Increment Data Pointer
1
1
MUL AB
Multiply A and B
1
4
DIV AB
Divide A by B
1
8
DA A
Decimal adjust A
1
1
Logical Operations
ANL A, Rn
AND Register to A
1
1
ANL A, direct
AND direct byte to A
2
2
ANL A, @Ri
AND indirect RAM to A
1
2
ANL A, #data
AND immediate to A
2
2


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