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C8051F300 Datasheet(PDF) 76 Page - List of Unclassifed Manufacturers

Part No. C8051F300
Description  Mixed Signal ISP Flash MCU Family
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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C8051F300 Datasheet(HTML) 76 Page - List of Unclassifed Manufacturers

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C8051F300/1/2/3/4/5
76
Rev. 2.6
SFR Definition 8.10. EIP1: Extended Interrupt Priority 1
Bits7–6: UNUSED. Read = 11b. Write = don’t care.
Bit5:
PCP0R: Comparator0 (CP0) Rising Interrupt Priority Control.
This bit sets the priority of the CP0 rising-edge interrupt.
0: CP0 rising interrupt set to low priority level.
1: CP0 rising interrupt set to high priority level.
Bit4:
PCP0F: Comparator0 (CP0) Falling Interrupt Priority Control.
This bit sets the priority of the CP0 falling-edge interrupt.
0: CP0 falling interrupt set to low priority level.
1: CP0 falling interrupt set to high priority level.
Bit3:
PPCA0: Programmable Counter Array (PCA0) Interrupt Priority Control.
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
Bit2:
PADC0C ADC0 Conversion Complete Interrupt Priority Control
This bit sets the priority of the ADC0 Conversion Complete interrupt.
0: ADC0 Conversion Complete interrupt set to low priority level.
1: ADC0 Conversion Complete interrupt set to high priority level.
Bit1:
PWADC0: ADC0 Window Comparator Interrupt Priority Control.
This bit sets the priority of the ADC0 Window interrupt.
0: ADC0 Window interrupt set to low priority level.
1: ADC0 Window interrupt set to high priority level.
Bit0:
PSMB0: SMBus Interrupt Priority Control.
This bit sets the priority of the SMBus interrupt.
0: SMBus interrupt set to low priority level.
1: SMBus interrupt set to high priority level.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
—
—
PCP0R
PCP0F
PPCA0
PADC0C PWADC0 PSMB0
11000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xF6


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