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PEEL18LV8ZS-15 Datasheet(PDF) 6 Page - Anachip Corp |
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PEEL18LV8ZS-15 Datasheet(HTML) 6 Page - Anachip Corp |
6 / 10 page Anachip Corp. www.anachip.com.tw Rev. 1.0 Dec 16, 2004 6/10 0.01 0.1 1 10 100 0.01 0.1 1 10 100 Frequency in MHz ICC in mA Figure 6 - Typical ICC vs. Input Clock Frequency for the 18LV8Z Design Security The PEEL18LV8Z provides a special EEPROM security bit that prevents unauthorized reading or copying of designs programmed into the device. The PLD programmer sets the security bit, either at the conclusion of the programming cycle or as a separate step, after the device has been programmed. Once the security bit is set it is impossible to verify (read) or program the PEEL until the entire device has first been erased with the bulk-erase function. Signature Word The signature word feature allows a 64-bit code to be programmed into the PEEL18LV8Z if the software option is used. The code can be read back even after the security bit has been set. The signature word can be used to identify the pattern programmed into the device or to record the design revision, etc. Programming Support Anachip's JEDEC file translator allows easy conversion of existing 20 pin PLD designs to the PEEL18LV8Z, without the need for redesign. Anachip also offers (for free) its proprietary PLACE software, an easy-to-use entry level PC-based software development system. Programming support includes all the popular third party programmers such as BP Microsystems, System General, Logic Devices and numerous others. |
Similar Part No. - PEEL18LV8ZS-15 |
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Similar Description - PEEL18LV8ZS-15 |
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