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IS61LV12824-10TQLI Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc |
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IS61LV12824-10TQLI Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc |
5 / 13 page IS61LV12824 1 2 3 4 5 6 7 8 9 10 11 12 ISSI® Integrated Silicon Solution, Inc. — 1-800-379-4774 5 Rev. D 06/22/05 CAPACITANCE(1) Symbol Parameter Conditions Max. Unit CIN Input Capacitance VIN = 0V 6 pF COUT Input/Output Capacitance VOUT = 0V 8 pF Note: 1. Tested initially and after any design or process changes that may affect these parameters. POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) -8 ns -10 ns Symbol Parameter Test Conditions Min. Max. Min. Max. Unit ICC Vcc Dynamic Operating VCC = Max., Com. — 210 — 180 mA Supply Current IOUT = 0 mA, f = fMAX Ind. — 240 — 210 ISB1 TTL Standby Current VCC = Max., Com. — 70 — 50 mA (TTL Inputs) VIN = VIH or VIL, f = max. Ind. — 80 — 55 CE1, CE2, ≥ VIH, CE2 ≤ VIL ISB2 CMOS Standby VCC = Max., Com. — 10 — 10 mA Current (CMOS Inputs) CE1, CE2 ≥ VCC – 0.2V, Ind. — 20 — 20 CE2 ≤ 0.2V, VIN ≥ VCC – 0.2V, or VIN ≤ 0.2V, f = 0 Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. AC TEST CONDITIONS Parameter Unit Input Pulse Level 0V to 3.0V Input Rise and Fall Times 2 ns Input and Output Timing 1.5V and Reference Level Output Load See Figures 1 and 2 AC TEST LOADS Figure 1 Figure 2 319 Ω 5 pF Including jig and scope 353 Ω OUTPUT 3.3V OUTPUT ZO = 50 Ω 1.5V 50 Ω |
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