ADS5410

SLAS346 – JUNE 2002

www.ti.com

9

Figure 10

PIN – Input Power – dBFS

0

10

20

30

40

50

60

70

80

–50

–40

–30

–20

–10

0

fS = 80 Msps

fIN = 23 MHz

AC PERFORMANCE

vs

INPUT POWER

SFDR

SINAD

SNR

THD

Figure 11

Duty Cycle – %

60

62

64

66

68

70

72

74

76

78

80

40

42

44

46

48

50

52

54

56

58

60

fS = 80 Msps

fIN = 17 MHz

AC PERFORMANCE

vs

DUTY CYCLE

SFDR

SINAD

SNR

THD

Figure 12

Clock Level – VPP (see Note)

64

66

68

70

72

74

76

78

80

012

34

fS = 80 Msps

fIN = 17.4 MHz

AC PERFORMANCE

vs

CLOCK LEVEL

SFDR

SINAD

SNR

THD

NOTE: Voltage peak to peak in pin 19 or 20. Multiply by 2 to

obtain differential peak to peak.

Figure 13

AVDD – Analog Supply Voltage– V

50

55

60

65

70

75

80

2.8

3.0

3.2

3.4

3.6

fS = 80 Msps

fIN = 17.4 MHz

AC PERFORMANCE

vs

ANALOG SUPPLY VOLTAGE

SFDR

SINAD

SNR

THD

Figure 14

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

0

0

5

10

15

20

25

30

35

40

f– Frequency – MHz

WCDMA SINGLE CARRIER MEASUREMENT

fS = 76.8 Msps

fIN = 57.6 MHz

Figure 15

f – Frequency – MHz

–20

–15

–10

–5

0

5

INPUT BANDWIDTH

10

100

1k

10k

†50% duty cycle. AVDD = 3.3 V, DVDD = 1.8 V, DVDD = 1.8 V