ALD1702A/ALD1702B

Advanced Linear Devices

4

ALD1702/ALD1703

Design & Operating Notes:

1. The ALD1702/ALD1703 CMOS operational amplifier uses a 3

gain stage architecture and an improved frequency compensation

scheme to achieve large voltage gain, high output driving capability,

and better frequency stability. In a conventional CMOS operational

amplifier design, compensation is achieved with a pole splitting

capacitor together with a nulling resistor. This method is, however,

very bias dependent and thus cannot accommodate the large

range of supply voltage operation as is required from a stand

alone CMOS operational amplifier. The ALD1702 is internally

compensated for unity gain stability using a novel scheme that

does not use a nulling resistor. This scheme produces a clean

single pole roll off in the gain characteristics while providing for

more than 70 degrees of phase margin at the unity gain frequency.

A unity gain buffer using the ALD1702 will typically drive 400pF of

external load capacitance without stability problems. In the inverting

unity gain configuration, it can drive up to 800pF of load capacitance.

Compared to other CMOS operational amplifiers, the ALD1702

has shown itself to be more resistant to parasitic oscillations.

2. The ALD1702/ALD1703 has complementary p-channel and n-channel

input differential stages connected in parallel to accomplish rail to rail

input common mode voltage range. This means that with the ranges

of common mode input voltage close to the power supplies, one of the

two differential stages is switched off internally. To maintain compa-

tibility with other operational amplifiers, this switching point has been

selected to be about 1.5V above the negative supply voltage. Since

offset voltage trimming on the ALD1702/ALD1703 is made when the

input voltage is symmetrical to the supply voltages, this internal

switching does not affect a large variety of applications such as an

inverting amplifier or non-inverting amplifier with a gain larger than 2.5

(5V operation), where the common mode voltage does not make

excursions below this switching point. The user should however, be

aware that this switching does take place if the operational amplifier

is connected as a unity gain buffer and should make provision in his

design to allow for input offset voltage variations.

3. The input bias and offset currents are essentially input protection

diode reverse bias leakage currents, and are typically less than 1pA

at room temperature. This low input bias current assures that the

analog signal from the source will not be distorted by input bias

currents. Normally, this extremely high input impedance of greater

Ω would not be a problem as the source impedance would

limit the node impedance. However, for applications where source

impedance is very high, it may be necessary to limit noise and hum

pickup through proper shielding.

4. The output stage consists of class AB complementary output drivers,

capable of driving a low resistance load. The output voltage swing is

limited by the drain to source on-resistance of the output transistors

as determined by the bias circuitry, and the value of the load resistor.

When connected in the voltage follower configuration, the oscillation

resistant feature, combined with the rail to rail input and output

feature, makes an effective analog signal buffer for medium to high

source impedance sensors, transducers, and other circuit networks.

5. The ALD1702/ALD1703 operational amplifier has been designed to

provide full static discharge protection. Internally, the design has

been carefully implemented to minimize latch up. However, care must

be exercised when handling the device to avoid strong static fields

that may degrade a diode junction, causing increased input leakage

currents. In using the operational amplifier, the user is advised to

power up the circuit before, or simultaneously with, any input voltages

applied and to limit input voltages to not exceed 0.3V of the power

supply voltage levels.

TYPICAL PERFORMANCE CHARACTERISTICS

INPUT BIAS CURRENT AS A FUNCTION

OF AMBIENT TEMPERATURE

AMBIENT TEMPERATURE (

°C)

1000

100

10

0.1

1.0

100

-25

0

75

125

50

25

-50

10000

OPEN LOOP VOLTAGE GAIN AS A FUNCTION

OF SUPPLY VOLTAGE AND TEMPERATURE

SUPPLY VOLTAGE (V)

1000

100

10

1

0

±2

±4

±6

°C

°C

°C

±8

SUPPLY CURRENT AS A FUNCTION

OF SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

±5

±4

±2

±3

0

±1

0

±1

±2

±3

±4

±5

±6

-25

°C

+25

°C

+80

°C

+125

°C

INPUTS GROUNDED

OUTPUT UNLOADED

COMMON MODE INPUT VOLTAGE RANGE

AS A FUNCTION OF SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

±7

±6

±5

±4

±3

±2

±1

0

0

±1

±2

±3

±4

±5

±6

±7