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MPQ8634B Datasheet(HTML) 19 Page - Monolithic Power Systems |
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MPQ8634B Datasheet(HTML) 19 Page - Monolithic Power Systems |
![]() MPQ8634B – 16V, 20A, SYNC, STEP-DOWN CONVERTER W/ ADJUSTABLE CURRENT LIMIT, PROGRAMMBALE FREQUENCY, AND VOLTAGE TRACKING MPQ8634B Rev. 1.02 www.MonolithicPower.com 19 11/16/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. PCB Layout Guidelines Efficient PCB layout is critical for stable operation. For optimal performance, refer to Figure 6 and follow the guidelines below. 1. Place the input MLCC capacitors as close to VIN and PGND as possible. 2. Place the major MLCC capacitors on the same layer as the MPQ8634B. 3. Maximize the VIN and PGND copper plane to minimize parasitic impedance. 4. Place as many PGND vias as possible as close to PGND as possible to minimize both parasitic impedance and thermal resistance. 5. Place the VCC decoupling capacitor close to the device. 6. Connect AGND and PGND at the point of the VCC capacitor’s ground connection. 7. Place the BST capacitor as close to BST and SW as possible with 20 mil or wider traces to route the path. It is recommended to use a bootstrap capacitor of 0.1μF to 1μF. 8. Place the REF capacitor close to TRK/REF to VSNS-. 9. Place via at least 10mm away from the positive side of the first input decoupling capacitor close to the IC if it must be placed on the PGOOD pad. 10. Place the OSENSE capacitor in between the output sense lines and close to the device. Figure 6: Recommended PCB Layout |
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