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APPLICATION INFORMATION

Power Dissipation

V

Sn

I

Sn

(1)

(V

Ln

I

(2)

T

J

q

JA

(3)

T

J

q

JA(S)

(4)

q

JA(S)

+

q

JC

q

JB

q

JC

(5)

40

60

80

100

120

140

0

100

200

300

400

500

D, Low−K

DW, Low−K

D, High−K

DW, High−K

Air Flow − LFM

TB3R1, TB3R2

SLLS587B – NOVEMBER 2003 – REVISED MAY 2004

Note that

θ

which the device is mounted, and on the airflow over

The power dissipation rating, often listed as the

the

device

and

PCB.

JEDEC/EIA

has

defined

package dissipation rating, is a function of the ambi-

standardized test conditions for measuring

θ

commonly used conditions are the low-K and the

device. This rating correlates with the device's maxi-

high-K

boards,

covered

by

EIA/JESD51-3

and

mum junction temperature, sometimes listed in the

EIA/JESD51-7 respectively. Figure 10 shows the

absolute maximum ratings tables. The maximum

low-K and high-K values of

θ

junction temperature accounts for the processes and

device and its package options.

materials used to fabricate and package the device,

in addition to the desired life expectancy.

The standardized

θ

JA

values may not accurately

represent the conditions under which the device is

There are two common approaches to estimating the

used. This can be due to adjacent devices acting as

heat sources or heat sinks, to nonuniform airflow, or

to the system PCB having significantly different ther-

needs to be calculated This is done by totaling the

mal characteristics than the standardized test PCBs.

supply power(s) to arrive at the system power

The second method of system thermal analysis is

dissispation:

more accurate. This calculation uses the power

dissipation and ambient temperature, along with two

device and two system-level parameters:

and then subtracting the total power dissipation of the

•

θ

external load(s):

degrees Celsius per watt

•

θ

degrees Celsius per watt

•

θ

and ambient temperature, along with one parameter:

degrees Celsius per watt

θ

the junction-to-ambient thermal resistance, in

•

θ

degrees Celsius per watt.

degrees Celsius per watt.

In this analysis, there are two parallel paths, one

rise above the ambient temperature. Therefore:

through the case (package) to the ambient, and

another through the device to the PCB to the ambi-

ent. The system-level junction-to-ambient thermal im-

pedance,

θ

of the two parallel paths:

where

The device parameters

θ

internal structure of the device. The system-level

parameters

θ

the PCB construction, adjacent electrical and mech-

anical components, and the environmental conditions

including airflow. Finite element (FE), finite difference

(FD), or computational fluid dynamics (CFD) pro-

grams can determine

θ

these programs are beyond the scope of this data

sheet, but are available from the software manufac-

turers.

Figure 10. Thermal Impedance vs Air Flow

8