AIC809/AIC810

PIN DESCRIPTIONS

7

GND Pin

: Ground.

threshold.

RESET Pin (AIC810)

: Active high output pin. RESET output remains high while Vcc is below the reset

threshold.

Vcc Pin

: Supply voltage.

DETAIL DESCRIPTIONS OF TECHNICAL TERMS

RESET OUTPUT

μ

P will be activated at a valid reset state. These

μ

P supervisory circuits assert reset to prevent

code

execution

errors

during

power-up,

power-down, or brownout conditions.

for the reset timeout period; after this interval,

If a brownout condition occurs (VCC drops below

VCC goes below the reset threshold, the internal

internal timer is activated after VCC returns

low for the reset timeout period.

BENEFITS OF HIGHLY ACCURATE RESET

THRESHOLD

AIC809/810 with specified voltage as 5V±10% or

3V±10% are ideal for systems using a 5V±5% or

3V±5% power supply. The reset is guaranteed to

assert after the power supply falls out of regulation,

but before power drops below the minimum

specified operating voltage range of the system

ICs. The pre-trimmed thresholds are reducing the

range over which an undesirable reset may occur.

APPLICATION INFORMATION

NEGATIVE-GOING VCC TRANSIENTS

In addition to issuing a reset to the μP during

power-up, power-down, and brownout conditions,

AIC809

series

are

relatively

resistant

to

short-duration negative-going VCC transient.

ENSURING A VALID RESET OUTPUT DOWN

TO VCC=0

output no longer sinks current; it becomes an

open circuit. In this case, high-impedance CMOS

undetermined voltages. Therefore, AIC809/810

with CMOS is perfect for most applications of VCC

below 0.9V. However in applications where

INTERFACING TO μP WITH BIDIRECTIONAL

RESET PINS

this device interfaces easily with μPs that have

bidirectional reset pins. Connecting the μ P

resistor allows either device to assert reset.