4

FN9171.1

Output Tolerance

Iout = 1mA

-2.5

2.5

%

Maximum Average Output Current

I_SRAM

50

mA

I_PLL

40

mA

Current Limit

Each LDO regulator

120

300

%

(Note 7)

Line Regulation

LVCC = 1.7-5.5V

0.25

%

Load Regulation

Io = 1 to 25mA

.5

%

Undervoltage Threshold

Rising - % of VPLL, VSRAM

91

%

Falling - % of VPLL, VSRAM

86

%

Start-Up Time

tst

Soft-start power up to 1.3V, Csoft = 10nF

1.3

ms

SYSTEM

Supply Current (VCC)

380

µA

EN = 0V

2

5

µA

Supply Current (LVCC)

25

µA

EN Voltage

2.0

V

0.55

V

Soft-Start Source Current

3.4

4.8

6.2

µA

6.7

9.6

12.5

µA

16

24

32

µA

30

47

64

µA

Temperature Shutdown

Rising T

130

140

150

°C

Falling T

85

95

105

°C

POR/BFLT# Threshold (Note 6)

Rising VCC

2.60

2.80

3.0

V

Falling VCC

2.44

2.60

2.76

V

PGOOD Pull Down Resistance

700

960

Ω

VIDEN, VID2, VID3 Voltage Threshold

2.4

V

1.0

V

SCL, SDA Voltage Threshold

2.0

V

0.55

V

SDA Pull Down Resistance

132

Ω

NOTES:

3. Guaranteed by design; correlated with statistic data for PVCC = VCC from 3.5V to 5.5V.

4. Switching frequency is a function of input, output voltage and load.

5. As a result of an over-current condition exceeding 800mA. Will result in a PGOOD fault.

6. A high rising POR tracks with a high falling POR.

7. Percentage of Maximum Average Output Current (I_SRAM or I_PLL).

Electrical Specifications

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

ISL6271A