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RTL8211FD-CG Datasheet(PDF) 35 Page - Realtek Semiconductor Corp. |
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RTL8211FD-CG Datasheet(HTML) 35 Page - Realtek Semiconductor Corp. |
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35 / 72 page  RTL8211F(I)/RTL8211FD(I) Datasheet Integrated 10/100/1000M Ethernet Transceiver 28 Track ID: JATR-8275-15 Rev. 1.1 7.15. Polarity Correction The RTL8211F(I)/RTL8211FD(I) automatically corrects polarity errors on the receive pairs in 1000Base-T and 10Base-T modes. In 100Base-TX mode polarity is irrelevant. In 1000Base-T mode, receive polarity errors are automatically corrected based on the sequence of idle symbols. Once the descrambler is locked, the polarity is also locked on all pairs. The polarity becomes unlocked only when the receiver loses lock. In 10Base-T mode, polarity errors are corrected based on the detection of validly spaced link pulses. The detection begins during the MDI crossover detection phase and locks when the 10Base-T link is up. The polarity becomes unlocked when the link is down. 7.16. Power A voltage regulator is implemented to generate operating power (switching regulator for the RTL8211F(I); LDO for the RTL8211FD(I)). The system vendor needs to supply a 3.3V, 1A steady power source. The RTL8211F(I)/RTL8211FD(I) converts the 3.3V steady power source to 1.0V via a switching regulator/LDO. Another possible implementation is to use an external regulator to generate 1.0V. Be sure that the regulator meets the required current rate (0.95V~1.05V). The RTL8211F(I)/RTL8211FD(I) implements an option for the RGMII power pins. The standard I/O voltage of the RGMII interface is 3.3V, with support for 2.5/1.8/1.5V to lower EMI. The 2.5/1.8/1.5V power source for RGMII is supplied from an internal LDO or from an external power source. 7.17. PHY Reset (Hardware Reset) The RTL8211F(I)/RTL8211FD(I) has a PHYRSTB pin to reset the chip. For a complete PHY reset, this pin must be asserted low for at least 10ms (Tgap in Figure 9) for the internal regulator. Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register. All registers will return to default values after a hardware reset. Refer to the RTL8211xx-xx_Power_Sequence_App_Note for more detailed information. Figure 9. PHY Reset Timing |
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Similar Description - RTL8211FD-CG |
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