 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
RTL8211FD-CG Datasheet(PDF) 47 Page - Realtek Semiconductor Corp. |
|
||||||||||||||||||||||||||||||
RTL8211FD-CG Datasheet(HTML) 47 Page - Realtek Semiconductor Corp. |
|
|
47 / 72 page  RTL8211F(I)/RTL8211FD(I) Datasheet Integrated 10/100/1000M Ethernet Transceiver 40 Track ID: JATR-8275-15 Rev. 1.1 Bit Name Type Default Description 18.2 Page Received Interrupt RW 0 1: Interrupt Enable 0: Interrupt Disable Setting this bit to 0 only masks a page received interrupt event in the INT interface. Reg29 Bit2 always reflects the page received interrupt behavior. 18.1 RSVD RW 0 Reserved. 18.0 Auto-Negotiation Error Interrupt RW 0 1: Interrupt Enable 0: Interrupt Disable Setting this bit to 0 only masks an auto-negotiation error interrupt event in the INT interface. Reg29 Bit0 always reflects the auto-negotiation error interrupt behavior. 8.4.16. PHYCR1 (PHY Specific Control Register 1, Address 0x18) Table 37. PHYCR1 (PHY Specific Control Register 1, Address 0x18) Bit Name Type Default Description 24.15:14 RSVD RO 00 Reserved. 24.13 PHYAD_0 Enable RW 1 1: A broadcast from MAC (A command with PHY address = 0) is valid. MDC/MDIO will respond to this command. 24.12:10 RSVD RO 000 Reserved. 24.9 MDI Mode Manual Configuration Enable RW 0 1: Enable Manual Configuration of MDI mode 24.8 MDI Mode RW 1 Set the MDI/MDIX mode. 1: MDI 0: MDIX This bit will take effect only when Reg 24.9 = 1. 24.7 TX CRS Enable RW 0 1: Assert CRS on transmit 0: Never assert CRS on transmit 24.6 PHYAD Non-zero Detect RW 0 1: The RTL8211F(I)/RTL8211FD(I) with PHYAD[2:0] = 000 will latch the first non-zero PHY address as its own PHY address 24.5 RSVD RO 0 Reserved. 24.4 Preamble Check Enable RW 1 1: Check preamble when receiving an MDC/MDIO command 24.3 Jabber Detection Enable RW 1 1: Enable Jabber Detection 24.2 ALDPS Enable RO 0 1: Enable Link Down Power Saving Mode 24.1:0 RSVD RO 00 Reserved. Note: The method to disable auto-crossover and force MDI or MDIX mode is as follows: Step 1: Set Reg24 bit[9]=1 (Manual Configuration of MDI mode) and set Reg24 bit[8]=1 (MDI) or 0 (MDIX). Step 2: Perform a PHY reset, i.e., set Reg0 bit[15]=1. |
Similar Part No. - RTL8211FD-CG |
|
Similar Description - RTL8211FD-CG |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
