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RTL8211FD-CG Datasheet(PDF) 23 Page - Realtek Semiconductor Corp. |
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RTL8211FD-CG Datasheet(HTML) 23 Page - Realtek Semiconductor Corp. |
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23 / 72 page  RTL8211F(I)/RTL8211FD(I) Datasheet Integrated 10/100/1000M Ethernet Transceiver 16 Track ID: JATR-8275-15 Rev. 1.1 Configuration Description CFG_LDO[1:0] LDO Output Voltage Selection for I/O pad/ External Power Source Voltage Selection for I/O pad. When pulling down CFG_EXT pin, CFG_LDO[1:0] represent LDO output voltage setting for IO pad: (via 4.7k-ohm to GND) 00: Reserved. 01: 2.5V 10: 1.8V 11: 1.5V When pulling up CFG_EXT pin, CFG_LDO[1:0] stand for external power voltage selection for IO pad: (via 4.7k-ohm to 3.3V) 00: 3.3V 01: 2.5V 10: 1.8V 11: 1.5V 7.9. LED and PHY Address Configuration In order to reduce the pin count on the RTL8211F(I)/RTL8211FD(I), the LED pins are duplexed with the CFG_EXT and CFG_LDO pins. As the Hardware Configuration shares the LED output pins, the external combinations required for strapping and LED usage must be considered in order to avoid contention. Specifically, when the LED outputs are used to drive LEDs directly, the active state of each output driver is dependent on the logic level sampled by the corresponding CFG_EXT/CFG_LDO inputs upon power-on/reset. For example, as Figure 5 (left-side) shows, if a given CFG_EXT/CFG_LDO inputs are resistively pulled high then the corresponding LED outputs will be configured as an active low driver. On the right side, we can see that if a given CFG_EXT/CFG_LDO inputs are resistively pulled low then the corresponding output will be configured as an active high driver. The Hardware Configuration pins should not be connected to GND or VCC directly, but must be pulled high or low through a resistor (e.g., 4.7K Ω). If no LED indications are needed, the components of the LED path (LED+510 Ω) can be removed. CFG_LDO[1:0] = Logical 1 CFG_LDO[1:0] = Logical 0 CFG_EXT = Logical 1 CFG_EXT = Logical 0 LED Indication=Active low LED Indication=Active High Figure 5. LED and PHY Address Configuration |
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