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CXD3048R Datasheet(PDF) 1 Page - Sony Corporation

Part # CXD3048R
Description  CD Digital Signal Processor with Built-in Digital Servo Shock-proof Memory Controller Digital High & Bass Boost
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Manufacturer  SONY [Sony Corporation]
Direct Link  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD3048R Datasheet(HTML) 1 Page - Sony Corporation

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E02653A37
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXD3048R
120 pin LQFP (Plastic)
CD Digital Signal Processor with Built-in Digital Servo +
Shock-proof Memory Controller + Digital High & Bass Boost
Description
The CXD3048R is a digital signal processor LSI for CD
players. This LSI incorporates a digital servo, high & bass
boost, shock-proof memory controller, 1-bit DAC and
analog low-pass filter.
Features
• All digital signal processing during playback is
performed with a single chip
• Highly integrated mounting possible due to a built-in RAM
Digital Signal Processor (DSP) Block
• Supports CAV (Constant Angular Velocity) playback
• Frame jitter free
• 0.5
× to 4× speed continuous playback possible
• Allows relative rotational velocity readout
• Wide capture range playback mode
• Spindle rotational velocity following method
• Supports 1
× to 4× speed playback
• Supports variable pitch playback
• The bit clock, which strobes the EFM signal, is
generated by the digital PLL.
• EFM data demodulation
• Enhanced EFM frame sync signal protection
• Refined super strategy-based powerful error correction
C1: double correction, C2: quadruple correction
Supported during 4
× speed playback
• Noise reduction during track jumps
• Auto zero-cross mute
• Subcode demodulation and subcode-Q data error
detection
• Digital spindle servo
• 16-bit traverse counter
• Asymmetry correction circuit
• CPU interface on serial bus
• Error correction monitor signal, etc. output from a new
CPU interface
• Servo auto sequencer
• Fine search performs track jumps with high accuracy
• Digital audio interface outputs
• Digital level meter, peak meter
• Bilingual compatible
• VCO control mode
• CD TEXT data demodulation
• Digital Out can be generated from the audio serial
input. (also supported after shock-proof and digital
bass boost processing, subcode-Q addition function)
Digital Servo (DSSP) Block
• Microcomputer software-based flexible servo control
• Offset cancel function for servo error signal
• Auto gain control function for servo loop
• E:F balance, focus bias adjustment functions
• Surf jump function supporting micro two-axis
• Tracking filter: 6 stages
Focus filter: 5 stages
Shock-proof Memory Controller Block
• Supports an external 4M-bit/16M-bit DRAM
• Time axis-based data linking
• ADPCM compression method (uncompressed/4 bits/
6 bits/8 bits)
Digital Filter, DAC and Analog Low-pass Filter Blocks
• Digital dynamic bass boost and high boost
Bass Boost: 4th-order IIR 24dB/Oct
+10dB/+14dB/+18dB/+22dB
High Boost: Second-order IIR 12dB/Oct
+4dB/+6dB/+8dB/+10dB
• Independent turnover frequency selection possible
Bass Boost: 125Hz/160Hz/200Hz
High Boost: 5kHz/7kHz
• Digital dynamics (compressor)
Volume increased by +5dB at low level
• 8
× oversampling digital filter
(attenuation: 61dB, ripple within band: ±0.0075dB)
• Digital signal output possible after boost
• Serial data format selectable from (output) 20 bits/
18 bits/16 bits (rearward truncation, MSB first)
• Digital attenuation: –
∞, –60 to +6dB, 2048 steps (linear)
• Soft mute
• Digital de-emphasis
• High-cut filter
Applications
CD players
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings
• Supply voltage VDD, AVDD
Vss – 0.5 to +3.5
V
• Input voltage
VI
Vss – 0.3 to VDD + 0.3
V
• Output voltage VO
Vss – 0.3 to VDD + 0.3
V
• Storage temperature
Tstg
–55 to +150
°C
• Supply voltage difference
AVSS – VSS
–0.3 to +0.3
V
AVDD – VDD
–0.3 to +0.3V (AVDD < 1.7V)
AVDD – VDD
–0.3 to +1.0V (AVDD = 1.7 to 2.7V)
Recommended Operating Conditions
• Supply voltage
VDD, AVDD0, 3, XVDD
1.7 to 2.7
V
AVDD1, 2, DVDD
VDD to 2.7
V
• Operating temperature Topr
–20 to +75
°C
I/O Pin Capacitance
• Input capacitance
CI
7 (max.)
pF
• Output capacitance
CO
7 (max.)
pF
Note) Measurement conditions
VDD = VI = 0V
fM = 1MHz


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