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RTL8100BL Datasheet(PDF) 30 Page - Realtek Semiconductor Corp. |
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RTL8100BL Datasheet(HTML) 30 Page - Realtek Semiconductor Corp. |
30 / 66 page RTL8100B(L) Datasheet Single-Chip 10/100 Ethernet Controller w/Power Management 24 Track ID: JATR-1076-21 Rev. 1.5 6.15. Multiple Interrupt Select Register (Offset 005Ch-005Dh, R/W) If the received packet data is not a familiar protocol (IPX, IP, NDIS, etc.) to the RTL8100B(L), RCR<ERTH[3:0]> won't be used to transfer data in early mode. This register will be written to the received data length in order to make an early Rx interrupt for the unfamiliar protocol. Bit R/W Symbol Description 15-12 - - Reserved 11-0 R/W MISR11-0 Multiple Interrupt Select: Indicates that the RTL8100B(L) makes an rx interrupt after RTL8100B(L) has transferred the byte data into the system memory. If the value of these bits is zero, there will be no early interrupt as soon as the RTL8100B(L) prepares to execute the first PCI transaction of the received data. Bit1, 0 must be zero. The ERTH3-0 bits should not be set to 0 when the multiple interrupt select register is used. Note: The above is true when MulERINT=0 (bit17, RCR). When MulERINT=1, any received packet invokes early interrupt according to the MISR[11:0] setting in early mode. 6.16. PCI Revision ID (Offset 005Eh, R) Bit R/W Symbol Description 7-0 R Revision ID The value in PCI Configuration Space offset 08h is 10h. 6.17. Transmit Status of All Descriptors (TSAD) Register (Offset 0060h-0061h, R/W) Bit R/W Symbol Description 15 R TOK3 TOK bit of Descriptor 3 14 R TOK2 TOK bit of Descriptor 2 13 R TOK1 TOK bit of Descriptor 1 12 R TOK0 TOK bit of Descriptor 0 11 R TUN3 TUN bit of Descriptor 3 10 R TUN2 TUN bit of Descriptor 2 9 R TUN1 TUN bit of Descriptor 1 8 R TUN0 TUN bit of Descriptor 0 7 R TABT3 TABT bit of Descriptor 3 6 R TABT2 TABT bit of Descriptor 2 5 R TABT1 TABT bit of Descriptor 1 4 R TABT0 TABT bit of Descriptor 0 3 R OWN3 OWN bit of Descriptor 3 2 R OWN2 OWN bit of Descriptor 2 1 R OWN1 OWN bit of Descriptor 1 0 R OWN0 OWN bit of Descriptor 0 |
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