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RTL8101L Datasheet(PDF) 55 Page - Realtek Semiconductor Corp. |
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RTL8101L Datasheet(HTML) 55 Page - Realtek Semiconductor Corp. |
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55 / 96 page  RTL8101L Datasheet Single-Chip Fast Ethernet Controller and MC’97 Controller w/Power Management 45 Track ID: JATR-1076-21 Rev. 1.5 Bit R/W Symbol Description 4 R/W ACLINK_WIE AC-LINK Wake-up Interrupt Enable. 1: Enable an interrupt when MC’97 issues a wake-up event on AC-LINK 0: Disable When disabled, an AC-LINK wake-up event does not trigger an interrupt, but an AC-LINK wake-up event (ACLINK_WES) is still indicated in INTSR.4 3 R/W ACLINK_OFF AC-LINK Shut Off 1: Drive all AC-LINK outputs low if AC97_BITCLK is stopped, also disable Line-In buffer. It’s software’s responsibility to set this bit after power-down MC’97 command to enable AC-LINK wake-up event function. It means that wake-up functions defined in bit[5:4] and ACLINK_WES (INTSR.4) will be effective when this bit is set 0: Normal operation 2 R/W ACLINK_WRST MC’97 Warm Reset. 1: Writing a ‘1’ to drive AC97_SYNC high at least 1.2us Writing a ‘1’ to this bit only effective while AC97_BITCLK is stopped. If software wants to issue a warm reset while AC97_BITCLK is running, the write is ignored and this bit is unchanged 0: No effect (normal) This bit is auto cleared by hardware after warm reset had been issued. 1 R/W ACLINK_CRST MC’97 Cold Reset. 1: Writing a ‘1’ to drive AC97_RESET# low for at least 1.2µs 0: No effect (normal, AC97_RESET# kept as high) This bit is auto set by hardware after cold reset had been issued. 0 R/W GPIE GPI Interrupt Enable. 1: The change on GPI Interrupt Status (AC-LINK status bit-0 of slot-12) will cause an interrupt on the PCI interface 0: Interrupt is not generated even if GPI Interrupt Status is set Note 1: AC-LINK wake-up event: AC97_SDATAIN is resumed high when AC-LINK signals are shut off. Note 2: Bit 5 and bit 3 are sticky bits preserved by consuming power from Vaux. 8.16. MC’97-Link Status and Index Register (Offset 0022h-0023h, R/W) Table 54. MC’97-Link Status and Index Register Bit R/W Symbol Description 15 R ACLINK_BZ AC-LINK busy. 1: AC-LINK is busy with an MC’97 register read/write transaction 0: No access is in progress It is set when controller is doing an AC-LINK read/write transaction, it is auto cleared by hardware after the transaction has been finished or AC-LINK Read Time-Out is set. Software should check this bit before doing an AC-LINK Read/Write command. Any written data into bit[7:0] before this bit is cleared by HW will be ignored. 14 R MC_RDY 1: MC’97 is in ready state. This bit indicates the state of bit-15 in slot-0 of AC97_SDATAIN 0: MC’97 is not ready |
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