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W79E632A Datasheet(PDF) 13 Page - Nuvoton Technology Corporation |
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W79E632A Datasheet(HTML) 13 Page - Nuvoton Technology Corporation |
13 / 79 page W79E632A/W79L632A Publication Release Date: Nov. 11, 2009 - 13 - Revision A10 MD2 −0: Stretch MOVX select bits: These three bits are used to select the stretch value for the MOVX instruction. Using a variable MOVX length enables the user to access slower external memory devices or peripherals without the need for external circuits. The RD or WR strobe will be stretched by the selected interval. When accessing the on-chip SRAM, the MOVX instruction is always in 2 machine cycles regardless of the stretch setting. By default, the stretch has value of 1. If the user needs faster accessing, then a stretch value of 0 should be selected. MD2 MD1 MD0 Stretch value MOVX duration 0 0 0 0 2 machine cycles 0 0 1 1 3 machine cycles (Default) 0 1 0 2 4 machine cycles 0 1 1 3 5 machine cycles 1 0 0 4 6 machine cycles 1 0 1 5 7 machine cycles 1 1 0 6 8 machine cycles 1 1 1 7 9 machine cycles Port 1 Bit: 7 6 5 4 3 2 1 0 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 Mnemonic: P1 Address: 90h P1.7 −0: General purpose I/O port. Most instructions will read the port pins in case of a port read access, however in case of read-modify-write instructions, the port latch is read. Some pins also have alternate input or output functions. This alternate functions are described below: P1.0 : T2 External I/O for Timer/Counter 2 P1.1 : T2EX Timer/Counter 2 Capture/Reload Trigger Port 4 Control Register A Bit: 7 6 5 4 3 2 1 0 P41M1 P41M0 P41C1 P41C0 P40M1 P40M0 P40C1 P40C0 Mnemonic: P4CONA Address: 92h Port 4 Control Register B Bit: 7 6 5 4 3 2 1 0 P43M1 P43M0 P43C1 P43C0 P42M1 P42M0 P42C1 P42C0 Mnemonic: P4CONB Address: 93h |
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