RTL8201N-GR_07 datasheet(3/39 Pages) REALTEK | SINGLE-CHIP/PORT 10/100 FAST ETHERNET PHYCEIVER WITH AUTO MDIX

Part #	RTL8201N-GR

Description	SINGLE-CHIP/PORT 10/100 FAST ETHERNET PHYCEIVER WITH AUTO MDIX

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Manufacturer	REALTEK [Realtek Semiconductor Corp.]

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RTL8201N

Datasheet

Single-Chip/Port 10/100 Fast Ethernet PHYceiver

With Auto MDIX

iii

Rev. 1.1

Table of Contents

1.

GENERAL DESCRIPTION................................................................................................................................................1

2.

FEATURES...........................................................................................................................................................................2

3.

APPLICATIONS ..................................................................................................................................................................2

4.

BLOCK DIAGRAM.............................................................................................................................................................3

5.

PIN ASSIGNMENTS ...........................................................................................................................................................4

5.1.

GREEN PACKAGE AND VERSION IDENTIFICATION.........................................................................................................4

6.

PIN DESCRIPTIONS ..........................................................................................................................................................5

6.1.

MII INTERFACE ............................................................................................................................................................5

6.2.

SNI (SERIAL NETWORK INTERFACE) 10MBPS ONLY ....................................................................................................6

6.3.

CLOCK INTERFACE .......................................................................................................................................................6

6.4.

10MBPS/100MBPS NETWORK INTERFACE....................................................................................................................7

6.5.

DEVICE CONFIGURATION INTERFACE ...........................................................................................................................7

6.6.

LED INTERFACE...........................................................................................................................................................8

6.7.

POWER PINS.................................................................................................................................................................8

6.8.

RESET AND OTHER PINS...............................................................................................................................................8

7.

REGISTER DESCRIPTIONS ............................................................................................................................................9

7.1.

REGISTER 0 BASIC MODE CONTROL REGISTER............................................................................................................9

7.2.

REGISTER 1 BASIC MODE STATUS REGISTER .............................................................................................................10

7.3.

REGISTER 2 PHY IDENTIFIER REGISTER 1..................................................................................................................11

7.4.

REGISTER 3 PHY IDENTIFIER REGISTER 2..................................................................................................................11

7.5.

REGISTER 4 AUTO-NEGOTIATION ADVERTISEMENT REGISTER (ANAR) ....................................................................11

7.6.

REGISTER 5 AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER (ANLPAR)......................................................12

7.7.

REGISTER 6 AUTO-NEGOTIATION EXPANSION REGISTER (ANER) .............................................................................13

7.8.

REGISTER 16 NWAY SETUP REGISTER (NSR).............................................................................................................13

7.9.

REGISTER 17 LOOPBACK, BYPASS, RECEIVER ERROR MASK REGISTER (LBREMR) .................................................13

7.10.

REGISTER 18 RX_ER COUNTER (REC) .....................................................................................................................14

7.11.

REGISTER 19 SNR DISPLAY REGISTER.......................................................................................................................14

7.12.

REGISTER 25 TEST REGISTER.....................................................................................................................................14

8.

FUNCTIONAL DESCRIPTION.......................................................................................................................................15

8.1.

MII AND MANAGEMENT INTERFACE ..........................................................................................................................15

8.1.1.

Data Transition.....................................................................................................................................................15

8.1.2.

Serial Management...............................................................................................................................................16

8.2.

AUTO-NEGOTIATION AND PARALLEL DETECTION ......................................................................................................17

8.2.1.

Setting the Medium Type and Interface Mode to MAC.........................................................................................17

8.2.2.

UTP Mode and MII Interface ...............................................................................................................................18

8.2.3.

UTP Mode and SNI Interface ...............................................................................................................................18

8.2.4.

Fiber Mode and MII Interface..............................................................................................................................18

8.3.

FLOW CONTROL SUPPORT ..........................................................................................................................................19

8.4.

HARDWARE CONFIGURATION AND AUTO-NEGOTIATION ............................................................................................19

8.5.

SERIAL NETWORK INTERFACE....................................................................................................................................20

8.6.

POWER DOWN, LINK DOWN, POWER SAVING, AND ISOLATION MODES ......................................................................20

8.7.

MEDIA INTERFACE .....................................................................................................................................................21

8.7.1.

100Base-TX Transmit & Receive Operation ........................................................................................................21

8.7.2.

100Base-FX Fiber Transmit & Receive Operation ..............................................................................................21

8.7.3.

10Base-T Transmit & Receive Operation.............................................................................................................22

8.8.

REPEATER MODE OPERATION.....................................................................................................................................22

8.9.

RESET, AND TRANSMIT BIAS ......................................................................................................................................22

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