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IC61LV256-15TI Datasheet(PDF) 8 Page - Integrated Circuit Solution Inc

Part # IC61LV256-15TI
Description  32K x 8 Hight Speed SRAM with 3.3V
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Manufacturer  ICSI [Integrated Circuit Solution Inc]
Direct Link  http://www.icsi.com.tw
Logo ICSI - Integrated Circuit Solution Inc

IC61LV256-15TI Datasheet(HTML) 8 Page - Integrated Circuit Solution Inc

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IC61LV256
8
Integrated Circuit Solution Inc.
AHSR027-0B
11/28/2003
DATA UNDEFINED
LOW
t WC
VALID ADDRESS
t PWE1
t AW
t HA
HIGH-Z
t HD
t SA
t HZWE
ADDRESS
CE
WE
DOUT
DIN
OE
DATAIN VALID
t LZWE
t SD
WRITE CYCLE NO. 2 (WE Controlled, OE is HIGH During Write Cycle) (1,2)
WRITE CYCLE NO. 3 (WE Controlled, OE is LOW During Write Cycle) (1)
DATA UNDEFINED
t WC
VALID ADDRESS
LOW
LOW
t PWE2
t AW
t HA
HIGH-Z
t HD
t SA
t HZWE
ADDRESS
CE
WE
DOUT
DIN
OE
DATAIN VALID
t LZWE
t SD
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE > VIH.


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