DATA SHEET • CX65105
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
4
October 15, 2004 • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • 101476F
0
5
10
15
20
25
30
1700
1800
1900
2000
2100
2200
Freq (MHz)
85C
25C
-30C
Figure 5. Typical Small Signal Gain vs Frequency Over
Temperature
0
10
20
30
40
50
1700
1800
1900
2000
2100
2200
Freq (MHz)
85C
25C
-30C
Figure 7. Typical OIP3 vs Frequency Over Temperature
0
1
2
3
4
5
6
7
8
1700
1800
1900
2000
2100
2200
Freq (MHz)
85C
25C
-30C
Figure 6. Typical Noise Figure vs Frequency Over Temperature
0
5
10
15
20
25
30
35
1700
1800
1900
2000
2100
2200
Freq (MHz)
-30C
25C
85C
Figure 8. Typical POUT vs Frequency Over Temperature
Evaluation Board Description
Skyworks CX65105 Evaluation Board is used to test the
performance of the CX65105 PA. The Evaluation Board schematic
diagram is shown in Figure 9. The schematic shows the basic
design of the board for the 1700 to 2200 MHz range. Figure 10
provides the Evaluation Board assembly diagram. Figure 11
provides the Evaluation Board layer detail.
Circuit Design Considerations
The following design considerations are general in nature and
must be followed regardless of final use or configuration
1. Paths to ground should be made as short as possible.
2. The ground pad of the CX65105 PA has special electrical and
thermal grounding requirements. This pad is the main thermal
conduit for heat dissipation. Since the circuit board acts as the
heat sink, it must shunt as much heat as possible from the
amplifier. As such, design the connection to the ground pad to
dissipate the maximum wattage produced to the circuit board.
Multiple vias to the grounding layer are required.
3. Two external output bypass capacitors (0.01
µF and 4.7 µF)
are required on the VCC1 (pin 8) supply input. The same two
capacitors are also required on the VCC2 (pin 4) supply input.
Both capacitors should be placed in parallel between the
supply line and ground. Also, a bypass capacitor of 0.01
µF is
required on the VREF input (pin 3). See Figure 9 for a detailed
diagram.
4. VCC1 (pin 8) and VCC2 (pin 4) may be connected together at
the supply.
5. At the RF input (pin 2), a DC blocking capacitor is required.
6. The RF output includes an onboard internal DC blocking
capacitor. All impedance matching is provided internally.
Therefore, the application only needs to provide a good 50
Ω
load.
Testing Procedure
Use the following procedure to set up the CX65105 Evaluation
Board for testing. Refer to Figure 12 for guidance: