Electronic Components Datasheet Search |
|
TMS29F800B-100BDBJL Datasheet(PDF) 11 Page - Texas Instruments |
|
TMS29F800B-100BDBJL Datasheet(HTML) 11 Page - Texas Instruments |
11 / 51 page TMS29F800T, TMS29F800B 1048576 BY 8-BIT/ 524288 BY 16-BIT FLASH MEMORIES SMJS835B – MAY 1997 – REVISED OCTOBER 1997 11 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 read mode A logic-low signal applied to the CE and OE pins allows the output of the TMS29F800T/B to be read. When two or more ’29F800T/B devices are connected in parallel, the output of any one device can be read without interference. The CE pin is for power control and must be used for device selection. The OE pin is for output control and is used to gate the data output onto the bus from the selected device. The address-access time (tAVQV) is the delay from stable address to valid output data. The chip-enable (CE) access time (tELQV) is the delay from CE low and stable addresses to valid output data. The output-enable access time (tGLQV) is the delay from OE low to valid output data when CE equals logic low and addresses are stable for at least the duration of tAVQV–tGLQV. standby mode ICC supply current is reduced by applying a logic-high level on CE and RESET to enter the standby mode. In the standby mode, the outputs are placed in the high-impedance state. Applying a CMOS logic-high level on CE and RESET reduces the current to 100 µA. Applying a TTL logic-high level on CE and RESET reduces the current to 1 mA. If the ’29F800T/B is deselected during erasure or programming, the device continues to draw active current until the operation is complete. output disable When OE equals VIH or CE equals VIH, output from the device is disabled and the output pins (DQ0–DQ15) are placed in the high-impedance state. automatic-sleep mode The ’29F800 has a built-in feature called automatic-sleep mode to minimize device energy consumption which is independent of CE, WE, and OE, and is enabled when addresses remain stable for 300 ns. Typical sleep-mode current is 100 µA. Sleep mode does not affect output data, which remains latched and available to the system. algorithm selection The algorithm-selection mode provides access to a binary code that matches the device with its proper programming and erase command operations. This mode is activated when VID (11.5 V to 12.5 V) is placed on address pin A9. Address pins A1 and A6 must be logic low. Two bytes of code are accessed by toggling address pin A0 from VIL to VIH. Address pins other than A0, A1, and A6 can be at logic low or at logic high. The algorithm-selection mode can also be read by using the command register, which is useful when VID is not available to be placed on address pin A9. Table 5 shows the binary algorithm-selection codes. Table 5. Algorithm-Selection Codes (5-V Single Power Supply)† CODE DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 Manufacturer- equivalent code 01H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 TMS29F800T–Byte D6H A–1 Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z 1 1 0 1 0 1 1 0 TMS29F800B–Byte 58H A–1 Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z 0 1 0 1 1 0 0 0 TMS29F800T 22D6H 0 0 1 0 0 0 1 0 1 1 0 1 0 1 1 0 TMS29F800B 2258H 0 0 1 0 0 0 1 0 0 1 0 1 1 0 0 0 Sector protection 01H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 † A1 = VIL, A6 = VIL, CE = VIL, OE = VIL |
Similar Part No. - TMS29F800B-100BDBJL |
|
Similar Description - TMS29F800B-100BDBJL |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |