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RTL8100C Datasheet(PDF) 54 Page - List of Unclassifed Manufacturers

Part # RTL8100C
Description  SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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RTL8100C Datasheet(HTML) 54 Page - List of Unclassifed Manufacturers

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RTL8100C & RTL8100CL
Datasheet
Single-Chip Fast Ethernet Controller
46
Track ID: JATR-1076-21 Rev. 1.06
2.
9346 D3c_support_PME = 0,
If Aux. power exists, then PMC in PCI config space is the same as 9346 PMC,
i.e. if 9346 PMC = C2 77, then PCI PMC = C2 77.
If Aux. power is absent, then PMC in PCI config space is the same as 9346 PMC except the above
4 bits are all 0’s, i.e. if 9346 PMC = C2 77, then PCI PMC = 02 76.
Note: In this case, if wakeup support is not desired when main power is off, it is suggested that the 9346
PMC be set to 02 76. It is not recommended to set the D0_support_PME bit to 1.
Link Wakeup
Link Wakeup occurs when the following conditions are met:
• The LinkUp bit (CONFIG3#4) is set to 1, the PMEn bit (CONFIG1#0) is set to 1, and the RTL8100C(L)
is in isolation state, or the PME# can be asserted in the current power state.
• The Link status is re-established.
Magic Packet Wakeup
A Magic Packet Wakeup occurs when the following conditions are met:
• The destination address of the received Magic Packet matches.
• The received Magic Packet does not contain a CRC error.
• The Magic bit (CONFIG3#5) is set to 1, the PMEn bit (CONFIG1#0) is set to 1, and the RTL8100C(L)
is in isolation state, or the PME# can be asserted in the current power state.
• The Magic Packet pattern matches, i.e. 6 * FFh + MISC (can be none) + 16 * DID (Destination ID) in
any part of a valid (Fast) Ethernet packet.
A Wakeup Frame event occurs only when the following conditions are met:
• The destination address of the received Wakeup Frame matches.
• The received Wakeup Frame does not contain a CRC error.
• The PMEn bit (CONFIG1#0) is set to 1.
• The 8-bit CRC* (or 16-bit CRC**) of the received Wakeup Frame matches with the 8-bit CRC (or
16-bit CRC) of the sample Wakeup Frame pattern received from the local machine’s OS.
• The last masked byte*** of the received Wakeup Frame matches with the last masked byte*** of the
sample Wakeup Frame pattern provided by the local machine’s OS (In Long Wakeup Frame mode, the
last masked byte field is replaced with the high byte of the 16-bit CRC).
*8-bit CRC:
8-bit CRC logic is used to generate an 8-bit CRC from the masked bytes of the received Wakeup Frame
packet within offset 12 to 75. Software should calculate the 8-bit Power Management CRC for each
specific sample wakeup frame and store the calculated CRC in the corresponding CRC register for the
RTL8100C(L) to check whether there is a Wakeup Frame coming in.


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