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TMS320DM643ZDK500 Datasheet(PDF) 6 Page - Texas Instruments |
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TMS320DM643ZDK500 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 160 page www.ti.com 2 Device Overview 2.1 Device Characteristics TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005 Table 2-1 provides an overview of the DM643 DSP. The table shows significant features of the DM643 device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count. Table 2-1. Characteristics of the DM643 Processor HARDWARE FEATURES DM643 EMIFA (64-bit bus width) 1 (clock source = AECLKIN) EDMA (64 independent channels) 1 McASP0 (uses Peripheral Clock [AUXCLK]) 1 I2C0 (uses Peripheral Clock) 1 Peripherals HPI (32- or 16-bit user selectable) 1 (HPI16 or HPI32) McBSP Not all peripherals pins are 1 (internal clock source = CPU/4 clock frequency) available at the same time (For more detail, see the Configurable Video Ports (VP1 and VP2) 2 Device Configuration sec- 10/100 Ethernet MAC (EMAC) 1 tion). Management Data Input/Output (MDIO) 1 VCXO Interpolated Control Port (VIC) 1 32-Bit Timers 3 (internal clock source = CPU/8 clock frequency) General-Purpose Input/Output Port (GP0) 16 Size (Bytes) 288K 16K-Byte (16KB) L1 Program (L1P) Cache On-Chip Memory Organization 16KB L1 Data (L1D) Cache 256KB Unified Mapped RAM/Cache (L2) CPU ID + CPU Rev ID Control Status Register (CSR.[31:16]) 0x0C01 JTAG BSDL_ID JTAGID register (address location: 0x01B3F008) 0x0007902F Frequency MHz 500, 600 2 ns (DM643-500) [500 MHz CPU, 100 MHz EMIF(1)] Cycle Time ns 1.67 ns (DM643-600) [600 MHz CPU, 133 MHz EMIF(1)] 1.2 V (-500) Core (V) 1.4 V (-600) Voltage I/O (V) 3.3 V PLL Options CLKIN frequency multiplier Bypass (x1), x6, x12 23 x 23 mm 548-Pin BGA (GDK and ZDK) BGA Package 27 x 27 mm 548-Pin BGA (GNZ and ZNZ) Process Technology µm 0.13 µm Product Preview (PP), Advance Information (AI), Product Status(2) PD or Production Data (PD) (1) On this DM64x™ device, the rated EMIF speed affects only the SDRAM interface on the EMIF. For more detailed information, see the EMIF device speed portion of this data sheet. (2) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 6 Device Overview |
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