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COP940C Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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COP940C Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 26 page DC Electrical Characteristics (Continued) COP82XC, COP84XC; −40˚C ≤ T A ≤ +85˚C unless otherwise specified Parameter Condition Min Typ Max Units Load Capacitance on D2 1000 pF Note 8: Rate of voltage change must be less than 0.5V/ms. Note 9: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open. Note 10: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to VCC, L and G0 — G5 configured as outputs and set high. The D port set to zero. Note 11: Except pin G7: +100 mA, −25 mA (COP820C only). Sampled and not 100% tested. Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than VCC and the pins will have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750Ω (typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V. AC Electrical Characteristics −40˚C ≤ T A ≤ +85˚C unless otherwise specified Parameter Condition Min Typ Max Units Instruction Cycle Time (tc) Ext. or Crystal/Resonator V CC ≥ 4.5V 1 DC µs (Div-by 10) 2.5V ≤ V CC < 4.5V 2.5 DC µs R/C Oscillator Mode V CC ≥ 4.5V 3 DC µs (Div-by 10) 2.5V ≤ V CC < 4.5V 7.5 DC µs CKI Clock Duty Cycle (Note 12) fr = Max 40 60 % Rise Time (Note 12) fr = 10 MHz Ext Clock 12 ns Fall Time (Note 12) fr = 10 MHz Ext Clock 8 ns Inputs t SETUP V CC ≥ 4.5V 200 ns 2.5V ≤ V CC < 4.5V 500 ns t HOLD V CC ≥ 4.5V 60 ns 2.5V ≤ V CC < 4.5V 150 ns Output Propagation Delay C L = 100 pF, RL = 2.2 kΩ t PD1,tPD0 SO, SK V CC ≥ 4.5V 0.7 µs 2.5V ≤ V CC < 4.5V 1.75 µs All Others V CC ≥ 4.5V 1 µs 2.5V ≤ V CC < 4.5V 2.5 µs MICROWIRE Setup Time (t UWS)20 ns MICROWIRE Hold Time (t UWH)56 ns MICROWIRE Output Propagation Delay (t UPD) 220 ns Input Pulse Width Interrupt Input High Time t C Interrupt Input Low Time t C Timer Input High Time t C Timer Input Low Time t C Reset Pulse Width 1.0 µs Note 12: Parameter sampled (not 100% tested). www.national.com 6 |
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