ICM105B VGA CMOS sensor
Data Sheet V1.6, August 2002
©2000, 2001,2002 IC Media Corporation & IC Media Technology Corp
10/16/2002
web site: http://www.ic-media.com/
web site: http://www.ic-media.com.tw/
page 10
Confidential
1: reference to Vdd
[2] Bit line read out power down
0: active
1: power down
[3] Bit line read select
0: bit line 3 is read out
1: bit line 646 is read out
[4] Bit line 3 external input enable
[5] Bit line 646 external input enable
0x95
0x96
AD_SLOPE_END_TIMEL
AD_SLOPE_END_TIMEH
0x02A9
(681)
[9:0] When auto slope adjustment is turned on, if
the slope counter exceeds this value, the ramp
will become steeper
0x97
0x98
AD_WT_BEGINL
AD_WT_BEGINH
0
[9:0] Wave table beginning point
0x99
0x9A
AD_WT_ENDL
AD_WT_ENDH
0x03FC
(1020)
[9:0] Wave table end point, when it is reached,
the waveform will remain fixed until the start of
next row
0x9B
0x9C
AD_SUB_EN_TIMEL
AD_SUB_EN_TIMEH
0x02F8
(760)
[9:0] Column position where the CDS subtraction
pulse is applied
0x9F
0xA0
AD_EXPOSE_TIMEL_C
AD_EXPOSE_TIMEH_C
0x0207
(519)
[15:0] Current exposure time, read only
0xA1
0xA2
AD_WIDTHL_C
AD_WIDTHH_C
0x0302
(770)
[9:0] Current frame width, read only
0xA3
0xA4
AD_HEIGHTL_C
AD_HEIGHTH_C
0x0208
(520)
[15:0] Current frame height, read only
0xA5
0xA6
AD_COL_BEGINL_C
AD_COL_BEGINH_C
0x0064
(100)
[9:0] Current column beginning position, read
only
0xA7
0xA8
AD_ROW_BEGINL_C
AD_ROW_BEGINH_C
0x000A
(10)
[9:0] Current row beginning position, read only
0xA9
0xAA
AD_HSYNC_ENDL_C
AD_HSYNC_ENDH_C
0x0040
(64)
[9:0] Current HSync end position, read only
0xAB
0xAC
AD_VSYNC_ENDL_C
AD_VSYNC_ENDH_C
0x0003
(3)
[15:0] Current VSync end position, read only
0xAD
AD_PART_CONTROL_C
0
[7:0] Current part control setting, read only
0xAE
0xAF
AD_WT_BEGINL_C
AD_WT_BEGINH_C
0
[9:0] Current wave table beginning point, read
only
0xB0
0xB1
AD_WT_ENDL_C
AD_WT_ENDH_C
0x03FC
(1020)
[9:0] Current wave table end point, read only
0xB6
0xB7
AD_F_MAX_ADDRL
AD_F_MAX_ADDRH
0x01E9
(489)
[15:0] Threshold above which the row address
mapping mechanism will be activated
0xB8
0xB9
AD_F_OVERL
AD_F_OVERH
0x01EA
(490)
[15:0] Second threshold above which another
address mapping is kicking in
0xBA
0xBB
AD_F_LIMITAL
AD_F_LIMITAH
0x01EB
(491)
[15:0] The substitute row address when the
original address is above AD_F_OVER in the
vertically flipped mode and when
TIMING_CONTROL[12] is 0
0xBC
0xBD
AD_F_LIMITBL
AD_F_LIMITBH
0x0002
(2)
[15:0] The substitute row address when the
original address is above AD_F_OVER in the
vertically flipped mode and when
TIMING_CONTROL[12] is 1
0xBE
0xBF
AD_F_LIMITCL
AD_F_LIMITCH
0x01EA
(490)
[15:0] The substitute row address when the
original address is between AD_F_MAX_ADDR
and AD_F_OVER in vertically flipped mode
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