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FUNCTIONAL DEFINITIONS

SN65LVCP40

SLLS623B – SEPTEMBER 2004 – REVISED MAY 2005

Table 2. Multiplex Controls MUX_S0 and MUX_S1

MUX FUNCTION

0

MUX_n select input B

1

MUX_n select input A

(1)

n = 0 or 1

Table 3. Loopback Controls LB0A, LB0B, LB1A and

LB1B

LOOPBACK FUNCTION

0

Enable loopback of SIx input to SOx output

1

Disable loopback of SIx input to SOx output

(1)

n = 0 or 1, x = A or B

Table 4. Multiplexer and Loopback Controls

INPUTS / OUTPUTS

SOA_0

SOB_0

SOA_1

SOB_1

LO_0

LO_1

SIA_0

LB0A = 0

x

x

x

MUX_S0 = 1

x

SIB_0

x

LB0B = 0

x

x

MUX_S0 = 0

x

SIA_1

x

x

LB1A = 0

x

x

MUX_S1 = 1

SIB_1

x

x

x

LB1B =0

x

MUX_S1 = 0

LI_0

LB0A = 1

LB0B = 1

x

x

x

x

LI_1

x

x

LB1A = 1

LB1B = 1

x

x

Table 5. Preemphasis Controls PREL_0, PREL_1, PRES_0, and PRES_1

OUTPUT

OUTPUT LEVEL IN mVpp

TYPICAL FR4

PREEMPHASIS

TRACE LENGTH

DEEMPHASIZED

PREEMPHASIZED

LEVEL IN dB

0

0

0 dB

1200

1200

10 inches of FR4 trace

0

1

3 dB

850

1200

20 inches of FR4 trace

1

0

6 dB

600

1200

30 inches of FR4 trace

1

1

9 dB

425

1200

40 inches of FR4 trace

(1)

x = L or S

Preemphasis is the primary signal conditioning mechanism. See Figure 1 and Figure 2 for further definition.

Equalization is secondary signal conditioning mechanism. The input stage provides 5-dB of fixed equalization

gain from 375 MHz to 1.875 GHz (optimized for 3.75-Gbps 8B10B coded data).

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