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ADS8381IBPFBR Datasheet(PDF) 10 Page - Texas Instruments |
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ADS8381IBPFBR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 35 page ADS8381 SLAS364D − APRIL 2002 − REVISED FEBRUARY 2005 www.ti.com 10 TIMING DIAGRAMS tw1 CONVST tpd1 tpd2 tw4 tsu1 BUSY CS CONVERT† tCONV SAMPLING† (When CS Toggle) BYTE tw2 tw3 tACQ th1 tCONV †Signal internal to device tsu5 tw7 tpd3 tHOLD tsu(AB) tsu(AB) MSB Hi−Z Hi−Z tpd4 ten BUS 18/16 RD DB[17:12] td1 tdis th2 tsu2 DB[11:10] DB[9:0] D[9:0] D[11:10] D[3:2] D[1:0] D[17:12] D[9:4] Hi−Z Hi−Z Hi−Z Hi−Z tsu5 tsu5 tsu5 Figure 1. Timing for Conversion and Acquisition Cycles With CS and RD Toggling |
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