STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
SIZE
A
5962-90899
REVISION LEVEL
C
SHEET
3
DSCC FORM 2234
APR 97
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix
A for device class M.
1.3 Absolute maximum ratings. 1/
Endurance:
Device types 01-04, 09 ..................................... 10,000 cycles/byte, minimum
Device types 05-08 ........................................ 1,000 cycles/byte, minimum
Device types 10-13 ........................................ 100,000 cycles/byte, minimum
Supply voltage range (V
) 2/ ................................ -2.0 V dc to +7.0 V dc
CC
Storage temperature range (T
) .............................. -65
C to +150C
stg
Maximum power dissipation (P ) .............................. 1.0 W
D
Lead temperature (soldering, 10 seconds) ....................... +300
C
Junction temperature (T ) 3/ ................................. +150
C
J
Thermal resistance, junction-to-case (
) (case outline X, Y) ...... See MIL-STD-1835
JC
Thermal resistance, junction-to-case (
) (case outlines T, Z) ...... 13C/W
JC
Thermal resistance, junction-to-case (
) (case outline U) ......... 27C/W
JC
Voltage on any pin with respect to ground 2/ ..................... -2.0 V dc to +7.0 V dc
Voltage on pin A with respect to ground 4/ ..................... -2.0 V dc to +13.5 V dc
9
V
supply voltage with respect to ground 4/ .................... -2.0 V dc to +14.0 V dc
PP
V
supply voltage with respect to ground 2/ .................... -2.0 V dc to +7.0 V dc
CC
Output short circuit current 5/ ................................. 200 mA
Data retention ............................................. 10 years minimum
1.4 Recommended operating conditions. 6/
Supply voltage range (V
) .................................. +4.5 V dc to +5.5 V dc
CC
Operating temperature range (T
) ........................... -55
C to +125C
case
Low level input voltage range (V ) ............................. -0.5 V dc to +0.8 V dc
IL
High level input voltage range (V
) ............................ +2.0 V dc to V
+0.5 V dc
IH
CC
High level input voltage range, CMOS (V
) ...................... V
-0.5 V dc to V
+0.5 V dc
IH
CC
CC
Chip clear (V ) ............................................. 11.4 V dc to 12.6 V dc
P
1.5 Digital logic testing for device classes Q and V.
Fault coverage measurement of manufacturing
logic tests (MIL-STD-883, test method 5012) .................... 100 percent
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ Minimum dc voltage on input or V
pins is -0.5 V. During voltage transitions, inputs may overshoot V
to -2.0 V for
OSS
periods of up to 20 ns. Maximum dc voltage on output and V
pins is V
+0.5 V. During voltage transitions outputs
OCC
may overshoot to V
+2.0 V for periods up to 20 ns.
CC
3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
4/ Minimum dc input voltage on A or V
may overshoot to +14.0 V for periods less than 20 ns.
9PP
5/ No more than one output shorted at a time. Duration of short circuit should not be greater than 1 second.
6/ All voltages are referenced to V
(ground).
SS