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MAX12527ETK Datasheet(PDF) 10 Page - Maxim Integrated Products

Part # MAX12527ETK
Description  Dual, 65Msps, 12-Bit, IF/Baseband ADC
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX12527ETK Datasheet(HTML) 10 Page - Maxim Integrated Products

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Dual, 65Msps, 12-Bit, IF/Baseband ADC
10
______________________________________________________________________________________
-THD, SFDR vs. ANALOG SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
VDD (V)
3.5
3.4
3.3
3.2
3.1
65
70
75
80
85
90
60
3.0
3.6
-THD
SFDR
SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 70MHz)
OVDD (V)
3.3
3.0
2.7
2.4
2.1
1.8
62
64
66
68
70
72
60
1.5
3.6
SNR
SINAD
-THD, SFDR vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 70MHz)
OVDD (V)
3.3
3.0
2.7
2.4
2.1
1.8
65
70
75
80
85
90
60
1.5
3.6
-THD
SFDR
SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
OVDD (V)
3.3
3.0
2.7
2.4
2.1
1.8
62
64
66
68
70
72
60
1.5
3.6
SNR
SINAD
-THD, SFDR vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
OVDD (V)
3.3
3.0
2.7
2.4
2.1
1.8
65
70
75
80
85
90
60
1.5
3.6
-THD
SFDR
PDISS, IVDD (ANALOG) vs. ANALOG SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
VDD (V)
3.5
3.4
3.3
3.2
3.1
100
200
300
400
500
600
700
800
900
0
3.0
3.6
PDISS (ANALOG)
IVDD
PDISS, IOVDD (DIGITAL) vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
OVDD (V)
3.3
3.0
1.8
2.1
2.4
2.7
10
20
30
40
50
60
70
80
0
1.5
3.6
PDISS (DIGITAL)
CL
≈ 5pF
IOVDD
SNR, SINAD vs. CLOCK DUTY CYCLE
(fIN = 70MHz, AIN = -0.5dBFS)
CLOCK DUTY CYCLE (%)
65
55
45
35
62
64
66
68
70
72
60
25
75
SNR
SINAD
SINGLE-ENDED CLOCK INPUT DRIVE
-THD, SFDR vs. CLOCK DUTY CYCLE
(fIN = 70MHz, AIN = -0.5dBFS)
CLOCK DUTY CYCLE (%)
65
55
45
35
65
70
75
80
85
90
60
25
75
-THD
SFDR
SINGLE-ENDED CLOCK INPUT DRIVE
Typical Operating Characteristics (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference mode), CL
≈ 5pF at digital outputs, VIN = -0.5dBFS,
DIFFCLK/SECLK = OVDD, PD = GND, G/T = GND, fCLK = 65MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)


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