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H83935R Datasheet(PDF) 10 Page - Hitachi Semiconductor |
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H83935R Datasheet(HTML) 10 Page - Hitachi Semiconductor |
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10 / 521 page  vi 9.5 Timer G .............................................................................................................................. 215 9.5.1 Overview............................................................................................................... 215 9.5.2 Register Descriptions ............................................................................................ 217 9.5.3 Noise Canceler ...................................................................................................... 221 9.5.4 Operation............................................................................................................... 223 9.5.5 Application Notes ................................................................................................. 227 9.5.6 Timer G Application Example .............................................................................. 232 9.6 Watchdog Timer................................................................................................................. 233 9.6.1 Overview............................................................................................................... 233 9.6.2 Register Descriptions ............................................................................................ 234 9.6.3 Timer Operation .................................................................................................... 238 9.6.4 Watchdog Timer Operation States ........................................................................ 239 Section 10 Serial Communication Interface................................................................. 241 10.1 Overview ............................................................................................................................ 241 10.2 SCI1 [Chip Internal Function] ........................................................................................... 242 10.2.1 Overview............................................................................................................... 242 10.2.2 Register Descriptions ............................................................................................ 244 10.2.3 Operation............................................................................................................... 250 10.2.4 Interrupt Source..................................................................................................... 252 10.2.5 Application Note................................................................................................... 253 10.3 SCI3 ................................................................................................................................... 254 10.3.1 Overview............................................................................................................... 254 10.3.2 Register Descriptions ............................................................................................ 258 10.3.3 Operation............................................................................................................... 280 10.3.4 Interrupts ............................................................................................................... 308 10.3.5 Application Notes ................................................................................................. 309 Section 11 A/D Converter .................................................................................................. 315 11.1 Overview ............................................................................................................................ 315 11.1.1 Features ................................................................................................................. 315 11.1.2 Block Diagram ...................................................................................................... 316 11.1.3 Pin Configuration .................................................................................................. 317 11.1.4 Register Configuration .......................................................................................... 317 11.2 Register Descriptions ......................................................................................................... 318 11.2.1 A/D Result Registers (ADRRH, ADRRL) ........................................................... 318 11.2.2 A/D Mode Register (AMR) .................................................................................. 318 11.2.3 A/D Start Register (ADSR)................................................................................... 320 11.2.4 Clock Stop Register 1 (CKSTPR1)....................................................................... 321 11.3 Operation ............................................................................................................................ 322 11.3.1 A/D Conversion Operation ................................................................................... 322 11.3.2 Start of A/D Conversion by External Trigger Input ............................................. 322 11.3.3 A/D Converter Operation Modes .......................................................................... 323 |
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