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TMS29F010-70CSFML Datasheet(PDF) 10 Page - Texas Instruments

Part # TMS29F010-70CSFML
Description  131072 BY 8-BIT FLASH MEMORY
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS29F010-70CSFML Datasheet(HTML) 10 Page - Texas Instruments

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TMS29F010
131072 BY 8-BIT
FLASH MEMORY
SMJS840A – NOVEMBER 1997 – REVISED JUNE 1998
10
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
exceed-time-limit (DQ5)
The program and erase operations use an internal pulse counter to limit the number of pulses applied. If the
pulse count limit is exceeded, DQ5 is set to a logic 1, indicating that the program or erase operation has failed.
DQ7 will not change from complemented data to true data and DQ6 will not stop toggling when read. To continue
operation, the device must be reset.
The exceed-time-limit condition occurs when attempting to program a logic 1 into a bit that has been
programmed previously to a logic 0. Only an erase operation can change bits from logic 0 to logic 1. After reset,
the device is functional and can be erased and reprogrammed.
sector-load-timer (DQ3)
The sector-load-timer status bit, DQ3, is used to determine if the time to load additional sector addresses has
expired. After completion of a sector-erase command sequence, DQ3 remains at a logic 0 for 80
µs. This
indicates that another sector-erase command sequence can be issued. DQ3 set at a logic 1 indicates that the
delay has expired and attempts to issue additional sector-erase commands are ignored. See the sector-erase
command section for a description.
The data-polling bit and toggle bit are valid during the 80-
µs time delay and can be used to determine if a valid
sector-erase command has been issued. To ensure additional sector-erase commands have been accepted,
the status of DQ3 should be read before and after each additional sector-erase command. If DQ3 is at a logic
low on both reads, then the additional sector-erase command was accepted.
data protection
hardware-sector protect feature
This feature disables both programming and erase operations on any combination of one to eight sectors.
Commands to program or erase a protected sector do not change the data contained in the sector. The
data-polling and toggle bits operate for 2
µs to 100 µs and then return to valid data. This feature is enabled using
high-voltage VID (11.5 V to 12.5 V) on address pin A9 and control pin G, and VIL on control pin E. Figure 14 shows
a flow chart of the sector-protect operation.
The device is delivered with all sectors unprotected; however, sector-unprotect mode is available to unprotect
protected sectors. Figure 16 is a flow chart of the sector-unprotect operation.
sector-protect operation
The sector-protect mode is activated when VCC = 5.0 V (and operation at TA = 25°C), W = VIH, E = VIL, and
address pin A9 and control pin G are forced to VID. The sector-select address pins A14, A15, and A16 are used
to select the sector to be protected. Address pins A0–A8, A10–A13, and I/O pins DQ0 – DQ7 must be stable and
can be VIL or VIH. Once the addresses are stable, W is pulsed low for 100 µs. The operation begins on the falling
edge of W and terminates on the rising edge of W. Figure 15 shows a timing diagram of the sector-protect
operation.
sector-protect verify
Verification of sector protection is activated when VCC = 5.0 V (and operation at TA = 25°C), W = VIH, G = VIL,
E = VIL, and address pin A9 = VID. Address pins A0 and A6 are set to VIL, and A1 is set to VIH. The sector-address
pins A14, A15, and A16 select the sector to be verified. The other address pins can be VIL or VIH. If the sector
selected is protected, the DQs output 01h, and if the sector selected is not protected, the DQs output 00h.


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