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EC103D1W Datasheet(HTML) 1 Page - WeEn Semiconductors |
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EC103D1W Datasheet(HTML) 1 Page - WeEn Semiconductors |
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EC103D1W SCR 21 August 2018 Product data sheet 1. General description Planar passivated ultra sensitive gate Silicon Controlled Rectifier in a SOT223 surface mountable plastic package. 2. Features and benefits • Planar passivated for voltage ruggedness and reliability • Ultra sensitive gate • Surface mountable package 3. Applications • Electronic ballasts • Safety shut down and protection circuits • Sensing circuits • Smoke detectors • Switched Mode Power Supplies 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VRRM repetitive peak reverse voltage - - 400 V IT(AV) average on-state current half sine wave; Tsp ≤ 114 °C; Fig. 1 - - 0.5 A IT(RMS) RMS on-state current half sine wave; Tsp ≤ 114 °C; Fig. 2; Fig. 3 - - 0.8 A half sine wave; Tj(init) = 25 °C; tp = 10 ms; Fig. 4; Fig. 5 - - 8 A ITSM non-repetitive peak on- state current half sine wave; Tj(init) = 25 °C; tp = 8.3 ms - - 9 A Tj junction temperature - - 125 °C Static characteristics IGT gate trigger current VD = 12 V; IT = 0.1 A; Tj = 25 °C; Fig. 9 - 3 12 µA Dynamic characteristics dVD/dt rate of rise of off-state voltage VDM = 268 V; Tj = 125 °C; (VDM = 67% of VDRM); exponential waveform; gate open circuit - 150 - V/µs |
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