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EM78P447NAM Datasheet(PDF) 8 Page - ELAN Microelectronics Corp |
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EM78P447NAM Datasheet(HTML) 8 Page - ELAN Microelectronics Corp |
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8 / 57 page  EM78P447N OTP ROM 4. FUNCTION DESCRIPTION IO C 5 R5 P 5 0 P 5 1 P 5 2 P 5 3 P 5 4 P 5 5 P 5 6 P 5 7 IO C 6 R6 IO C 7 R7 ACC R3 ST ACK 1 ST ACK 2 ST ACK 3 ST ACK 4 ST ACK 5 P C RO M In stru ctio n Re g is te r In stru ctio n De c o d e r AL U In te rru p t Co n tro l R4 RA M W D T Tim e r Pre s c a le r O s c illa to r/T im in g Co n tro l WD T Tim e -o u t R1 (T CC) Sle e p & Wa k e Co n tro l DA T A & C O NT R O L B U S /IN T TC C OS C I OS C O /R E SET P 6 0 P 6 1 P 6 2 P 6 3 P 6 4 P 6 5 P 6 6 P 6 7 P 7 0 P 7 1 P 7 2 P 7 3 P 7 4 P 7 5 P 7 6 P 7 7 Fig. 2 Functional Block Diagram 4.1 Operational Registers 1. R0 (Indirect Addressing Register) R0 is not a physically implemented register. Its major function is to act as an indirect addressing pointer. Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Register (R4). 2. R1 (Time Clock /Counter) • Increased by an external signal edge, which is defined by TE bit (CONT-4) through the TCC pin, or by the instruction cycle clock. • Writable and readable as any other registers. • Defined by resetting PAB (CONT-3). • The prescaler is assigned to TCC, if the PAB bit (CONT-3) is reset. This specification is subject to change without prior notice. 10.21.2004 (V1.0) 8 |
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