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A82DL1632UG-70I Datasheet(PDF) 10 Page - AMIC Technology |
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A82DL1632UG-70I Datasheet(HTML) 10 Page - AMIC Technology |
10 / 57 page A82DL16x2T(U) Series PRELIMINARY (May, 2005, Version 0.1) 9 AMIC Technology, Corp. Table 1-2. Device Bus Operations – Flash Byte Mode ( BYTE_F = VIL) Operation (Notes 1, 2) CE_F E1_S C CE2_S OE WE A0-A19 LB_S (Note3) UB_S (Note3) RESET WP /ACC (Note 4) I/O7– I/O0 I/O15– I/O8 H X Read from Flash L X L L H AIN X X H L/H IOUT High-Z H X Write to Flash L X L H L AIN X X H (Note 3) IIN I/O14–8 =Hi-Z; I/O15=A-1 H X Standby VCC ± 0.3 V X L X X X X X VCC_F ± 0.3 V H High-Z High-Z H H X L X Output Disable L L H H X X X L H L/H High-Z High-Z H X Flash Hardware Reset X X L X X X X X L L/H High-Z High-Z H X Sector Protect (Notes) L X L H L SA, A6 = L, A1 = H, A0 = L X X VID L/H IIN X H X Sector Unprotect (Note 5) L X L H L SA, A6 = H, A1 = H, A0 = L X X VID (Note 6) IIN X H X Temporary Sector Unprotect X X L X X AIN X X VID (Note 6) IIN High-Z H L IOUT IOUT H L High-Z IOUT Read from SRAM H L H L H AIN L H H X IOUT High-Z H L IIN IIN L H High-Z IIN Write to SRAM H L H X L AIN L H H X IIN High-Z Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 8.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = Sector Address, AIN = Address In (for Flash Byte Mode, I/O15=A-1), IIN = Data In, IOUT = Data Out Notes: 1.Other operations except for those indicated in this column are inhibited. 2.Do not apply CE_F = VIL, CE1_S = VIL and CE2_S = VIH at the same time. 3.Don’t care or open LB_S or UB_S . 4.The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector Block Protection and Unprotection” section. 5. If WP /ACC = VIL, the two outermost boot sectors remain protected. If WP /ACC = VIH, the two outermost boot sector protection depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and Unprotection”. If WP /ACC = VHH, all sectors will be unprotected. |
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