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MC74A5-33SNTR Datasheet(PDF) 6 Page - ON Semiconductor |
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MC74A5-33SNTR Datasheet(HTML) 6 Page - ON Semiconductor |
6 / 12 page MC74 http://onsemi.com 6 AB C D E F G H I J K L M ILOW IHIGH t SU–DATA t H–DATA t SU(START) t H(START) t SU(STOP) t IDLE SCL SDA A = Start Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave E = Slave Pulls SDA Line Low F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Slave H = LSB of Data Clocked into Slave I = Slave Pulls SDA Line Low J = Acknowledge Clocked into Master K = Acknowledge Clock Pulse L = Stop Condition, Data Executed by Slave M= New Start Condition AB C D E F G H I J K ILOW IHIGH t SU–DATA t SU(START) t H(START) t SU(STOP) t IDLE SCL SDA A = Start Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave E = Slave Pulls SDA Line Low F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Master H = LSB of Data Clocked into Master I = Acknowledge Clock Pulse J = Stop Condition K = New Start Condition SMBUS Write Timing Diagram SMBUS Read Timing Diagram Figure 2. |
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