K6T8016C3M-RB55 datasheet(5/9 Pages) SAMSUNG

Part #	K6T8016C3M-RB55

Description	512Kx16 bit Low Power CMOS Static RAM

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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5 / 9 page

K6T8016C3M Family

Revision 1.01

April 2000

5

CMOS SRAM

CL1)

1.Including scope and jig capacitance

AC OPERATING CONDITIONS

TEST CONDITIONS(Test Load and Input/Output Reference)

Input pulse level: 0.4 to 2.2V

Input rising and falling time: 5ns

Input and output reference voltage:1.5V

Output load(see right): CL=100pF+1TTL

CL=50pF+1TTL

DATA RETENTION CHARACTERISTICS

Item

Symbol

Test Condition

Min

Typ

Max

Unit

Vcc for data retention

VDR

CS

≥Vcc-0.2V

2.0

-

5.5

V

Data retention current

IDR

Vcc=3.0V, CS

≥Vcc-0.2V

CS

≥Vcc-0.2V

K6T8016C3M-B

-

20

µA

K6T8016C3M-F

-

30

Data retention set-up time

tSDR

See data retention waveform

0

-

ms

Recovery time

tRDR

5

-

AC CHARACTERISTICS (VCC=4.5~5.5V, Commercial product:TA=0 to 70

°C, Industrial product:TA=-40 to 85°C)

Parameter List

Symbol

Speed Bins

Units

55ns

70ns

Min

Max

Min

Max

Read

Read cycle time

tRC

55

-

70

-

ns

Address access time

tAA

-

55

-

70

ns

Chip select to output

tCO

-

55

-

70

ns

Output enable to valid output

tOE

-

25

-

35

ns

Chip select to low-Z output

tLZ

10

-

10

-

ns

Output enable to low-Z output

tOLZ

5

-

5

-

ns

LB, UB enable to low-Z output

tBLZ

5

-

5

-

ns

Chip disable to high-Z output

tHZ

0

20

0

25

ns

Output Disable to High-Z Output

tOHZ

0

20

0

25

ns

Output hold from address change

tOH

10

-

10

-

ns

LB, UB valid to data output

tBA

-

25

-

35

ns

UB, LB disable to high-Z output

tBHZ

0

20

0

25

ns

Write

Write cycle time

tWC

55

-

70

-

ns

Chip select to end of write

tCW

45

-

60

-

ns

Address set-up time

tAS

0

-

0

-

ns

Address valid to end of write

tAW

45

-

60

-

ns

Write pulse width

tWP

40

-

55

-

ns

Write recovery time

tWR

0

-

0

-

ns

Write to output high-Z

tWHZ

0

20

0

25

ns

Data to write time overlap

tDW

20

-

30

-

ns

Data hold from write time

tDH

0

-

0

-

ns

End write to output low-Z

tOW

5

-

5

-

ns

LB, UB valid to end of write

tBW

45

-

60

-

ns

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