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CD74HCT4520MTE4 Datasheet(PDF) 1 Page - Texas Instruments |
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CD74HCT4520MTE4 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 13 page 1 Data sheet acquired from Harris Semiconductor SCHS216D Features • Positive or Negative Edge Triggering • Synchronous Internal Carry Propagation • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative- going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3 to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. Pinout CD54HC4520 (CERDIP) CD74HC4518 (PDIP) CD74HC4520, CD74HCT4520, (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE CD54HC4520F3A -55 to 125 16 Ld CERDIP CD74HC4518E -55 to 125 16 Ld PDIP CD74HC4520E -55 to 125 16 Ld PDIP CD74HC4520M -55 to 125 16 Ld SOIC CD74HC4520MT -55 to 125 16 Ld SOIC CD74HC4520M96 -55 to 125 16 Ld SOIC CD74HCT4520E -55 to 125 16 Ld PDIP CD74HCT4520M -55 to 125 16 Ld SOIC CD74HCT4520MT -55 to 125 16 Ld SOIC CD74HCT4520M96 -55 to 125 16 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 1CP 1E 1Q0 1Q1 1Q2 1Q3 GND 1MR VCC 2Q3 2Q2 2Q1 2Q0 2E 2CP 2MR November 1997 - Revised October 2003 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, Texas Instruments Incorporated CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520 High-Speed CMOS Logic Dual Synchronous Counters [ /Title (CD74 HC451 8, CD74 HC452 0, CD74 HCT45 20) /Sub- ject |
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