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ISL6566A Datasheet(PDF) 7 Page - Intersil Corporation |
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ISL6566A Datasheet(HTML) 7 Page - Intersil Corporation |
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7 / 28 page  7 FN9200.2 July 27, 2005 Timing Diagram Simplified Power System Diagram Functional Pin Description VCC VCC is the bias supply for the ICs small-signal circuitry. Connect this pin to a +5V supply and locally decouple using a quality 1.0 µF ceramic capacitor. PVCC1 and PVCC2 These pins are the power supply pins for the corresponding channel MOSFET drive, and can be connected to any voltage from +5V to +12V, depending on the desired MOSFET gate drive level. Internally these pins are bonded so DO NOT connect these pins to different voltages. GND GND is the bias and reference ground for the IC. ENLL This pin is a threshold-sensitive (approximately 0.66V) enable input for the controller. Held low, this pin disables controller operation. Pulled high, the pin enables the controller for operation. ENLL has a internal 1.0 µA pull-up to 5V. FS A resistor, placed from FS to ground, will set the switching frequency. Refer to Equation 34 for proper resistor calculation. VID4, VID3, VID2, VID1, VID0, and VID12.5 These are the inputs for the internal DAC that provides the reference voltage for output regulation. These pins respond to TTL logic thresholds. The ISL6566A decodes the VID inputs to establish the output voltage; see VID Tables for correspondence between DAC codes and output voltage settings. These pins are internally pulled high, to approximately 1.2V, by 40 µA (typically) internal current sources; the internal pull-up current decreases to 0 as the VID voltage approaches the internal pull-up voltage. All VID pins are compatible with external pull-up voltages not exceeding the IC’s bias voltage (VCC). VRM10 This pin selects VRM10.0 DAC compliance when pulled high or open. If VRM10 is grounded, VID12.5 selects the compliance standard for the internal DAC: pulled to ground, it encodes the DAC with AMD Hammer VID codes, while left open or pulled high, it encodes the DAC with Intel VRM9.0 codes. VSEN and RGND VSEN and RGND are inputs to the precision differential remote-sense amplifier and should be connected to the sense pins of the remote load. ICOMP, ISUM, and IREF ISUM, IREF, and ICOMP are the DCR current sense amplifier’s negative input, positive input, and output respectively. For accurate DCR current sensing, connect a resistor from each channel’s phase node to ISUM and connect IREF to the summing point of the output inductors, roughly Vout. A parallel R-C feedback circuit connected between ISUM and ICOMP will then create a voltage from IREF to ICOMP proportional to the voltage drop across the inductor DCR. This voltage is referred to as the droop voltage and is added to the differential remote-sense amplifier output. Note: An optional 0.01 µF ceramic capacitor can be placed from the IREF pin to the ISUM pin to help reduce any noise affects that may occur due to layout. VDIFF VDIFF is the output of the differential remote-sense amplifier. The voltage on this pin is equal to the difference between VSEN and RGND added to the difference between IREF and ICOMP. VDIFF therefore represents the output voltage plus the droop voltage. FB and COMP These pins are the internal error amplifier inverting input and output respectively. FB, VDIFF, and COMP are tied together through external R-C networks to compensate the regulator. REF The REF input pin is the positive input of the error amplifier. It is internally connected to the DAC output through a 1k Ω resistor. A capacitor is used between the REF pin and ground UGATE LGATE tFLGATE tPDHUGATE tRUGATE tFUGATE tPDHLGATE tRLGATE ISL6566A ISL6566A |
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