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X28C513J-12T1 Datasheet(PDF) 9 Page - Intersil Corporation |
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X28C513J-12T1 Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 25 page 9 FN8106.1 September 29, 2005 Software Data Protection Software Algorithm Selecting the software data protection mode requires the host system to precede data write operations by a series of three write operations to three specific addresses. Refer to Figure 4A and 4B for the sequence. The three byte sequence opens the page write window, enabling the host to write from one to one hundred twenty-eight bytes of data. Once the page load cycle has been completed, the device will automatically be returned to the data protected state. Regardless of whether the device has previously been protected or not, once the software data protected algorithm is used and data has been written, the X28C512, X28C513 will automatically disable further writes, unless another command is issued to cancel it. If no further commands are issued the X28C512, X28C513 will be write protected during power-down and after any subsequent power-up. The state of A15 while executing the algorithm is don’t care. Note: Once initiated, the sequence of write operations should not be interrupted. CE WE (VCC) Write Protected VCC 0V Data Addr AAA 5555 55 2AAA A0 5555 ≤ tBLC MAX Writes ok Byte or Page tWC Note: All other timings and control pins are per page write timing requirements FIGURE 4A. TIMING SEQUENCE—SOFTWARE DATA PROTECT ENABLE SEQUENCE FOLLOWED BY BYTE OR PAGE WRITE Write Last Write Data XX to any Write Data 80 to Address 5555 Write Data 55 to Address 2AAA Write Data AA to Address 5555 After tWC Re-Enters Data Protected State Byte to Last Address Address Optional Byte/Page Load Operation FIGURE 4B. WRITE SEQUENCE FOR SOFTWARE DATA PROTECTION X28C512, X28C513 |
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