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X28C010RM-15 Datasheet(PDF) 1 Page - Intersil Corporation

Part # X28C010RM-15
Description  5 Volt, Byte Alterable EEPROM
Download  23 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X28C010RM-15 Datasheet(HTML) 1 Page - Intersil Corporation

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1
®
FN8105.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X28C010
5 Volt, Byte Alterable EEPROM
The Intersil X28C010 is a 128K x 8 EEPROM, fabricated
with Intersil's proprietary, high performance, floating gate
CMOS technology. Like all Intersil programmable non-
volatile memories, the X28C010 is a 5V only device. The
X28C010 features the JEDEC approved pin out for byte-
wide memories, compatible with industry standard
EEPROMs.
The X28C010 supports a 256-byte page write operation,
effectively providing a 19µs/byte write cycle and enabling the
entire memory to be typically written in less than 2.5
seconds. The X28C010 also features DATA Polling and
Toggle Bit Polling, system software support schemes used to
indicate the early completion of a write cycle. In addition, the
X28C010 supports Software Data Protection option.
Intersil EEPROMs are designed and tested for applications
requiring extended endurance. Data retention is specified to
be greater than 100 years.
Features
• Access time: 120ns
• Simple byte and page write
- Single 5V supply
- No external high voltages or VPP control
circuits
- Self-timed
• No erase before write
• No complex programming algorithms
• No overerase problem
• Low power CMOS
- Active: 50mA
- Standby: 500µA
• Software data protection
- Protects data against system level inadvertent writes
• High speed page write capability
• Highly reliable Direct Writecell
- Endurance: 100,000 write cycles
- Data retention: 100 years
• Early end of write detection
-DATA polling
- Toggle bit polling
Pinouts
232
43
31
NC
A16
A
15
A12
A
7
A
6
A5
A
4
A3
A
2
A
1
A0
I/O
0
I/O1
I/O2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
WE
NC
A14
A13
A
8
A9
A
11
OE
A10
CE
I/O7
I/O
6
I/O5
I/O4
I/O
3
X28C010
CERDIP
Flat Pack
SOIC (R)
PGA
X28C010
(Bottom View)
14
A0
16
I/O1
18
VSS
11
A3
9
A5
7
A7
15
I/O0
17
I/O2
19
I/O3
5
A15
2
NC
36
VCC
20
I/O4
21
I/O5
34
NC
23
I/O7
25
A10
27
A11
29
A8
22
I/O6
32
NC
24
CE
26
OE
28
A 9
30
A 13
13
A1
12
A2
10
A4
8
A6
4
A
16
3
NC
1
NC
35
WE
33
NC
31
A 14
6
A12
X28C010
(Top View)
A6
A5
A4
A3
A2
A1
A0
I/O0
A13
A8
A9
A11
A10
I/O7
A14
6
1
5
8
7
9
10
11
12
13
15
17
16
18 19 20
22
23
24
25
26
27
28
29
OE
CE
A7
14
21
30
X28C010
(Top View)
A6
A5
A4
A3
A2
A1
A0
I/O 0
A13
A8
A9
A11
A10
I/O7
A14
OE
CE
A7
30
PLCC
LCC
EXTENDED LCC
22
23
24
25
26
27
28
29
21
6
5
8
7
9
10
11
12
13
232
43
31
1
15
17
16
18 19 20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
X28C010
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
NC
NC
VSS
NC
NC
I/O2
I/O1
I/O0
A0
A1
A2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
A11
A9
A8
A13
A14
NC
NC
NC
WE
VCC
NC
NC
NC
A16
A15
A12
A7
A6
A5
TSOP
14
20
A3
21
A4
Data Sheet
May 11, 2005


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