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X9271TV Datasheet(PDF) 6 Page - Intersil Corporation

Part # X9271TV
Description  Single Supply/Low Power/256-Tap/SPI Bus
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X9271TV Datasheet(HTML) 6 Page - Intersil Corporation

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6
FN8174.1
March 31, 2005
DEVICE DESCRIPTION
Wiper Counter Register (WCR)
The X9271 contains a Wiper Counter Register for the
DCP potentiometer. The Wiper Counter Register can
be envisioned as a 8-bit parallel and serial load
counter with its outputs decoded to select one of 256
switches along its resistor array. The contents of the
WCR can be altered in four ways: it may be written
directly by the host via the Write Wiper Counter
Register instruction (serial load); it may be written
indirectly by transferring the contents of one of four
associated data registers via the XFR Data Register
instruction (parallel load); it can be modified one step
at a time by the Increment/ Decrement instruction.
Finally, it is loaded with the contents of its Data
Register zero (DR0) upon power-up.
The Wiper Counter Register is a volatile register; that
is, its contents are lost when the X9271 is powered-
down. Although the register is automatically loaded
with the value in DR0 upon power-up, this may be
different from the value present at power-down.
Power-up guidelines are recommended to ensure
proper loadings of the R0 value into the WCR. The
DR0 value of Bank 0 is the default value.
Data Registers (DR3–DR0)
The potentiometer has four 8-bit nonvolatile Data
Registers. These can be read or written directly by the
host. Data can also be transferred between any of the
four Data Registers and the associated Wiper Counter
Register. All operations changing data in one of the
Data Registers is a nonvolatile operation and will take
a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can
be used as regular memory locations for system
parameters or user preference data.
Bits [7:0] are used to store one of the 256 wiper
positions or data (0 ~255).
Status Register (SR)
This 1-bit Status Register is used to store the system
status.
WIP: Write In Progress status bit, read only.
– When WIP=1, indicates that high-voltage write cycle
is in progress.
– When WIP=0, indicates that no high-voltage write
cycle is in progress
Table 1. Wiper counter Register, WCR (8-bit), WCR[7:0]: Used to store the current wiper position (Volatile, V).
Table 2. Data Register, DR (8-bit), DR[7:0]: Used to store wiper positions or data (Nonvolatile, NV).
Table 3. Status Register, SR (WIP is 1-bit)
WCR7
WCR6
WCR5
WCR4
WCR3
WCR2
WCR1
WCR0
VVVVVVVV
(MSB)
(LSB)
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
NV
NV
NV
NV
NV
NV
NV
NV
MSB
LSB
WIP
(LSB)
X9271


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