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X40235 Datasheet(PDF) 1 Page - Intersil Corporation |
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X40235 Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 36 page 1 ® FN8115.0 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X40231, X40233, X40235, X40237, X40239 Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP FEATURES • Triple Voltage Monitors —User Programmable Threshold Voltage —Power-on Reset (POR) Circuitry —Software Selectable Reset timeout —Manual Reset Input • 2-Wire industry standard Serial Interface • 2 kbit EEPROM with Write Protect & Block LockTM • Digitally Controlled Potentiometers (DCP) —Total Resistance 256 Tap = 100k Ω, 100 Tap or 64 Tap = 10kΩ —Nonvolatile wiper position —Write Protect Function • Single Supply Operation —2.7V to 5.5V • 16 Pin SOIC (300) package —SOIC DESCRIPTION The X4023x family of Integrated System Manage- ment ICs combine CPU Supervisor functions (VCC Power-onpower-on Reset (POR) circuitry, two addi- tional programmable voltage monitor inputs with soft- ware and hardware indicators), integrated EEPROM with Block LockTM protection and one or two Intersil Digitally Controlled Potentiometers (XDCP). All func- tions of the X4023x are accessed by an industry standard 2-Wire serial interface. APPLICATIONS The DCP of the X4023x may be utilized to software control analog voltages for: – LCD contrast, LCD purity, or Backlight control. – Power Supply settings such as PWM frequency, Voltage Trimming or Margining (temperature offset control). – Reference voltage setting (e.g. DDR-SDRAM SSTL-2) The 2 kbit integrated EEPROM may be used to store ID, manufacturer data, maintenance data and module definition data. The programmable POR circuit insures VCC is stable before RESET is removed and protects against brown-outs and power failures. The programmable voltage monitors have on-chip independent reference alarm levels. With separate outputs, the voltage moni- tors can be used for power-on sequencing. BLOCK DIAGRAM X4023X Family Selector Guide X= 256 tap 100 tap 64 Tap 11 31 51 71 1 91 1 DATA REGISTER COMMAND DECODE & CONTROL LOGIC SDA SCL POWER-ON / LOW VOLTAGE CR REGISTER PROTECT LOGIC EEPROM THRESHOLD RESET LOGIC 4 GENERATION RESET V2MON VCC VTRIP1 V3MON + - 2 kbit RESET Manual Reset (MR) 8 RH RW V2FAIL WP V3FAIL ARRAY 2 ©2000 Intersil Inc., Patents Pending (VTRIP1,2,3 are user programmable) WIPER REGISTER RH RW COUNTER 8 - BIT NONVOLATILE MEMORY 256 Tap DCP Optional 64 or 100 Tap DCP VSS VTRIP2 VTRIP3 WIPER REGISTER COUNTER 8 - BIT NONVOLATILE MEMORY + - – + Data Sheet April 11, 2005 |
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