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X80202V20I Datasheet(PDF) 10 Page - Intersil Corporation |
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X80202V20I Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 16 page 10 FN8154.0 Register Information The Register Block is organized as follows: • Status Register (SR) (1 Byte). Located at address 00h. • Remote Shut Down Register (RSR) (1 Byte). Located at address FFh. The Status Register provides the user a mechanism for checking the status of GATE_H, GATE_M and GATE_L. These bits are volatile and are read only. The gate status values in the Status Register can be read at any time by performing a random read operation. Only one byte is returned by each read operation. The master should supply a stop condition following the output byte to be consistent with the bus protocol. STAT_GATEH: GATEH Status Flag (volatile) STAT_GATEH will be set to ‘1’ when the GATE_H charge pump is turned on. It will be reset to ‘0’ when the GATE_H charge pump is turned off. STAT_GATEM: GATEM Status Flag (volatile) STAT_GATEM will be set to ‘1’ when GATE_M charge pump is turned on. It will be reset to ‘0’ when the GATE_M charge pump is turned off. STAT_GATEL: GATEL Status Flag (volatile) STAT_GATEL will be set to ‘1’ when GATE_L charge pump is turned on. It will be reset to ‘0’ when the GATE_L charge pump is turned off. The status register also contains a WEL bit that controls write operations to the Shutdown Register. Bits 7, 6, 5, and 4 should always be set to ‘0’. WEL: Write Enable Latch (Volatile) The WEL bit controls the access to the Remote Shutdown Register (RSR). This bit is a volatile latch that powers up in the LOW (disabled) state. While the WEL bit is LOW, writes to the RSR will be ignored (no acknowledge will be issued after the Data Byte). The WEL bit is set by writing a “1” to the WEL bit and zeroes to the other bits of the status register. The X80200 provides the user with a software shutdown of GATE_H, GATE_L and GATE_M. This over-rides the normal output control. A write operation with data 01h to the RSR will immediately turn off GATE_M followed by GATE_L. The GATE_L turn off is delayed by tDELAY_DOWN. A write operation with data 02 to the RSR will turn off GATE_H. A write operation with data 03 to RSR will shutdown all gates. GATE_H turn off at the same time as GATE_M. GATE_L turns off after a delay of tDELAY_DOWN. A write operation with data 00h to the RSR will remove the software override function. Assuming all supplies are good, the X80200 will return to the previous state by first turning on GATE_H and GATE_L. Then, GATE_M is turned on according to the power sequencing mode chosen. Bits 7, 6, 5, 4, 3 and 2 of the Remote Shutdown Register should always be set to ‘0’. The data in the RSR can be read by performing a random read operation to the RSR. The data in the RSR powers up in ‘0’ state. Bus Interface Information Interface Conventions The device supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is called the master and the device being controlled is called the slave. The master always initiates data transfers, and provides the clock for both transmit and receive operations. Therefore, the devices in this family operate as slaves in all applications. Status Register (Volatile) 7 6 5 4 321 0 00 00 STAT_ GATEH STAT_ GATEM STAT_ GATEL WEL Remote Shutdown Register (RSR) (Volatile) RSR DATA GATE SHUTDOWN SEQUENCE 01 GATE_M, GATE_L GATE_M turns off, then after time tDELAY_DOWN GATE_L turns off. 02 GATE_H Immediate turn off of GATE_H 03 GATE_H, GATE_M, GATE_L GATE_H and GATE_M turn off, then after time tDELAY_DOWN GATE_L turns off. 00 no override X80200 returns to previous condition, assuming all supplies are good, GATE_H and GATE_L turn on, then GATE_M turns on according to the chosen sequence mode. X80200, X80201, X80202, X80203, X80204 |
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