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X90100M8IT1 Datasheet(PDF) 2 Page - Intersil Corporation |
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X90100M8IT1 Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 7 page 2 FN8156.0 February 2, 2005 Block Diagram Cm CPAD U/D INC CS VSS CPAD Cp 1*CU 2*CU 4*CU 8*CU 16*CU Logic and E2 Power On Reset VCC Pin Descriptions MSOP SYMBOL BRIEF DESCRIPTION 1INC Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the capacitance value and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. 2U/D Up/Down (U/D). The U/D input controls the direction of the trimmed capacitor value and whether the counter is incremented or decremented. 3VSS Ground. 4Cp Cp. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance across the terminals is determined by digital inputs INC, U/D, and CS. 5Cm Cm. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance across the terminals is determined by digital inputs INC, U/D, and CS. 6N/C Not Connected. Must be floating. 7CS Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X90100 will be placed in the low power standby mode until the device is selected once again. 8VCC Positive Supply Voltage. X90100 |
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