Electronic Components Datasheet Search |
|
EL5181CS-T7 Datasheet(PDF) 8 Page - Intersil Corporation |
|
EL5181CS-T7 Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 9 page 8 Applications Information Power Supplies and Circuit Layout The EL5181 comparator operates with single and dual sup- ply with 5V to 12V between VS+ and VS-. The output side of the comparator is supplied by a single supply from 2.7V to 5V. The rail to rail output swing enables direct connection of the comparator to both CMOS and TTL logic circuits. As with many high speed devices, the supplies must be well bypassed. Elantec recommends a 4.7µF tantalum in parallel with a 0.1µF ceramic. These should be placed as close as possible to the supply pins. Keep all leads short to reduce stray capacitance and lead inductance. This will also mini- mize unwanted parasitic feedback around the comparator. The device should be soldered directly to the PC board instead of using a socket. Use a PC board with a good, unbroken low inductance ground plane. Good ground plane construction techniques enhance stability of the comparators. Input Voltage Considerations The EL5181 input range is specified from 0.1V below VS- to 2.25V below VS+. The criterion for the input limit is that the output still responds correctly to a small differential input sig- nal. The differential input stage is a pair of PNP transistors, therefore, the input bias current flows out of the device. When either input signal falls below the negative input volt- age limit, the parasitic PN junction formed by the substrate and the base of the PNP will turn on, resulting in a significant increase of input bias current. If one of the inputs goes above the positive input voltage limit, the output will still maintain the correct logic level as long as the other input stays within the input range. However, the propagation delay will increase. When both inputs are outside the input voltage range, the output becomes unpredictable. Large differential voltages greater than the supply voltage should be avoided to prevent damages to the input stage. Input Slew Rate Most high speed comparators oscillate when the voltage of one of the inputs is close to or equal to the voltage on the other input due to noise or undesirable feedback. For clean output waveform, the input must meet certain minimum slew rate requirements. In some applications, it may be helpful to apply some positive feedback (hysteresis) between the out- put and the positive input. The hysteresis effectively causes one comparator's input voltage to move quickly past the other, thus taking the input out of the region where oscillation occurs. For the EL5181, the propagation delay increases when the input slew rate increases for low overdrive volt- ages. With high overdrive voltages, the propagation delay does not change much with the input slew rate. Latch Pin Dynamics The EL5181 contains a “transparent” latch for each channel. The latch pin is designed to be driven with either a TTL or CMOS output. When the latch is connected to a logic high level or left floating, the comparator is transparent and imme- diately responds to the changes at the input terminals. When the latch is switched to a logic low level, the comparator out- put remains latched to its value just before the latch’s high- to-low transition. To guarantee data retention, the input sig- nal must remain the same state at least 1ns (hold time) after the latch goes low and at least 2ns (setup time) before the latch goes low. When the latch goes high, the new data will appear at the output in approximately 6ns (latch propagation delay). Hysteresis Hysteresis can be added externally. The following two meth- ods can be used to add hysteresis. Inverting comparator with hysteresis: R3 adds a portion of the output to the threshold set by R1 and R2. The calculation of the resistor values are as follows: Select the threshold voltage VTH and calculate R1 and R2. The current through R1/R2 bias string must be many times greater than the input bias current of the comparator: Let the hysteresis be VH, and calculate R3: where: VO=VSD-0.8V (swing of the output) Recalculate R2 to maintain the same value of VTH: Non inverting comparator with hysteresis: R3 adds a portion of the output to the positive input. Note that the current through R3 should be much greater than the input bias current in order to minimize errors. The calculation of the resistor values as follows: Pick the value of R1. R1 should be small (less than 1kΩ) in order to minimize the propagation delay time. Choose the hysteresis VH and calculate R3: + - R3 VIN VREF R2 R1 V TH V REF R 1 R 1 R 2 + --------------------- × = R 3 V O V H -------- R 1 ( R 2 ) || × = R 21VREF ( ()-V TH ) V TH R 1 ----------- ÷ V TH -0.5VSD R 3 ----------------------------------- + = + - R3 VIN VREF R1 R 3 V ( SD -0.8 ) R 1 V H -------- × = EL5181 |
Similar Part No. - EL5181CS-T7 |
|
Similar Description - EL5181CS-T7 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |