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MC74HC00ADR2 Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74HC00ADR2 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2004 December, 2004 − Rev. 9 1 Publication Order Number: MC74HC00A/D MC74HC00A Quad 2−Input NAND Gate High−Performance Silicon−Gate CMOS The MC74HC00A is identical in pinout to the LS00. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Features • Pb−Free Packages are Available* • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2 to 6 V • Low Input Current: 1 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance With the JEDEC Standard No. 7 A Requirements • Chip Complexity: 32 FETs or 8 Equivalent Gates 3 Y1 1 A1 PIN 14 = VCC PIN 7 = GND LOGIC DIAGRAM 2 B1 6 Y2 4 A2 5 B2 8 Y3 9 A3 10 B3 11 Y4 12 A4 13 B4 Y = AB Pinout: 14−Lead Packages (Top View) 13 14 12 11 10 9 8 2 1 3 4567 VCC B4 A4 Y4 B3 A3 Y3 A1 B1 Y1 A2 B2 Y2 GND *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MARKING DIAGRAMS A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week TSSOP−14 DT SUFFIX CASE 948G HC 00A ALYW 1 14 1 14 PDIP−14 N SUFFIX CASE 646 MC74HC00AN AWLYYWW SOIC−14 D SUFFIX CASE 751A 1 14 HC00A AWLYWW L L H H L H L H FUNCTION TABLE Inputs Output AB H H H L Y See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ORDERING INFORMATION http://onsemi.com |
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