© Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 7

1

Publication Order Number:

MC74HC139A/D

MC74HC139A

Dual 1-of-4 Decoder/

Demultiplexer

High–Performance Silicon–Gate CMOS

The MC74HC139A is identical in pinout to the LS139. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

This device consists of two independent 1–of–4 decoders, each of

which decodes a two–bit Address to one–of–four active–low outputs.

Active–low Selects are provided to facilitate the demultiplexing and

cascading functions. The demultiplexing function is accomplished by

using the Address inputs to select the desired device output, and

utilizing the Select as a data input.

No. 7A

LOGIC DIAGRAM

A0a

A1a

SELECTa

A0b

A1b

1

SELECTb

Y0a

Y1a

Y2a

Y3a

Y0b

Y1b

Y2b

Y3b

ACTIVE–LOW

OUTPUTS

ADDRESS

INPUTS

PIN 16 = VCC

PIN 8 = GND

ACTIVE–LOW

OUTPUTS

3

2

ADDRESS

INPUTS

13

14

15

4

5

6

7

12

11

10

9

FUNCTION TABLE

Inputs

Outputs

Select

A1

A0

Y0

Y1 Y2

Y3

HX

X

H

H

H

H

LL

L

L

H

H

H

LL

H

H

L

H

H

LH

L

H

H

L

H

LH

H

H

H

H

L

X = don’t care

SO–16

D SUFFIX

CASE 751B

http://onsemi.com

1

16

PDIP–16

N SUFFIX

CASE 648

1

16

MARKING

DIAGRAMS

1

16

MC74HC139AN

AWLYYWW

1

16

HC139A

AWLYWW

A

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

Device

Package

Shipping

ORDERING INFORMATION

MC74HC139AN

PDIP–16

2000 / Box

MC74HC139AD

SOIC–16

48 / Rail

MC74HC139ADR2

SOIC–16

2500 / Reel

PIN ASSIGNMENT

13

14

15

16

9

10

11

12

5

4

3

2

1

8

7

6

SELECTa

A1a

A0a

GND

A1b

A0b

SELECTb

VCC

Y0a

Y1a

Y2a

Y3a

Y0b

Y1b

Y2b

Y3b