© Semiconductor Components Industries, LLC, 2000

May, 2000 – Rev. 9

1

Publication Order Number:

MC74HC240A/D

MC74HC240A

Octal 3-State Inverting

Buffer/Line Driver/Line

Receiver

High–Performance Silicon–Gate CMOS

The MC74HC240A is identical in pinout to the LS240. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

This octal noninverting buffer/line driver/line receiver is designed

to be used with 3–state memory address drivers, clock drivers, and

other sub–oriented systems. The device has inverting outputs and two

active–low output enables.

The HC240A is similar in function to the HC244A.

No. 7A

LOGIC DIAGRAM

DATA

INPUTS

A1

A2

A3

A4

B1

B2

B3

B4

17

15

13

11

8

6

4

218

16

14

12

9

7

5

3

YB4

YB3

YB2

YB1

YA4

YA3

YA2

YA1

INVERTING

OUTPUTS

PIN 20 = VCC

PIN 10 = GND

OUTPUT

ENABLES

ENABLE A

ENABLE B

1

19

FUNCTION TABLE

Inputs

Outputs

Enable A,

Enable B

A, B

YA, YB

LL

H

LH

L

HX

Z

Z = high impedance

http://onsemi.com

MARKING

DIAGRAMS

1

20

A

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

SOIC WIDE–20

DW SUFFIX

CASE 751D

HC240A

AWLYYWW

PDIP–20

N SUFFIX

CASE 738

1

20

MC74HC240AN

AWLYYWW

TSSOP–20

DT SUFFIX

CASE 948E

1

20

1

20

1

20

Device

Package

Shipping

ORDERING INFORMATION

MC74HC240AN

PDIP–20

1440 / Box

MC74HC240ADW

SOIC–WIDE

38 / Rail

MC74HC240ADWR2

SOIC–WIDE

1000 / Reel

MC74HC240ADT

TSSOP–20

75 / Rail

MC74HC240ADTR2

TSSOP–20

2500 / Reel

PIN ASSIGNMENT

A3

A2

YB4

A1

ENABLE A

GND

YB1

A4

YB2

YB3

5

4

3

2

1

10

9

8

7

6

14

15

16

17

18

19

20

11

12

13

YA2

B4

YA1

ENABLE B

VCC

B1

YA4

B2

YA3

B3

HC

240A

ALYW

1

20