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TLC3548IDWRG4 Datasheet(PDF) 2 Page - Texas Instruments |
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TLC3548IDWRG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 40 page TLC3544, TLC3548 5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS SLAS266C – OCTOBER 2000 – REVISED MAY 2003 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) In addition to being a high-speed ADC with versatile control capability, these devices have an on-chip analog multiplexer (MUX) that can select any analog input or one of three self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK (normal sampling) or can be controlled by CSTART to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short sampling (12 SCLKs) or long sampling (44 SCLKs) to accommodate the faster SCLK operation popular among high-performance signal processors. The TLC3544 and TLC3548 are designed to operate with low power consumption. The power saving feature is further enhanced with software power-down/ autopower-down modes and programmable conversion speeds. The conversion clock (internal OSC) is built in. The converter can also use an external SCLK as the conversion clock for maximum flexibility. The TLC3544 and TLC3548 have a 4-V internal reference. The converters are specified with unipolar input range of 0-V to 5-V when a 5-V external reference is used. AVAILABLE OPTIONS PACKAGED DEVICES TA 20-TSSOP (PW) 20-SOIC (DW) 24-SOIC (DW) 24-TSSOP (PW) 0 °C to 70°C TLC3544CPW TLC3544CDW TLC3548CDW TLC3548CPW – 40 °C to 85°C TLC3544IPW TLC3544IDW TLC3548IDW TLC3548IPW functional block diagram Analog MUX 4-V Reference Command Decode CMR (4 MSBs) SAR ADC OSC Conversion Clock FIFO X8 Control Logic 4-Bit Counter SDO EOC/INT DVDD AVDD DGND AGND CSTART FS CS SCLK SDI CFR REFM BGAP REFP X8 A0 A1 A2 A3 A4 A5 A6 A7 X4 A0 A1 A2 A3 X X X X |
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