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MSP430F2619 Datasheet(PDF) 50 Page - Texas Instruments |
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MSP430F2619 Datasheet(HTML) 50 Page - Texas Instruments |
50 / 120 page 50 MSP430F2619, MSP430F2618, MSP430F2617, MSP430F2616 MSP430F2419, MSP430F2418, MSP430F2417, MSP430F2416 SLAS541L – JUNE 2007 – REVISED MAY 2020 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430F2619 MSP430F2618 MSP430F2617 MSP430F2616 MSP430F2419 MSP430F2418 MSP430F2417 MSP430F2416 Specifications Copyright © 2007–2020, Texas Instruments Incorporated (1) The leakage current is defined in the leakage current table with P6.x/Ax parameter. (2) The analog input voltage range must be within the selected reference voltage range VR+ to VR- for valid conversion results. (3) The internal reference supply current is not included in current consumption parameter IADC12. (4) The internal reference current is supplied via terminal AVCC. Consumption is independent of the ADC12ON control bit, unless a conversion is active. The REFON bit enables settling of the built-in reference before starting an A/D conversion. (5) Not production tested, limits verified by design. 5.43 12-Bit ADC Power Supply and Input Range Conditions (1) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT AVCC Analog supply voltage AVCC and DVCC are connected together, AVSS and DVSS are connected together, V(AVSS) = V(DVSS) = 0 V 2.2 3.6 V V(P6.x/Ax) Analog input voltage range(2) All P6.0/A0 to P6.7/A7 terminals, Analog inputs selected in ADC12MCTLx register, P6Sel.x = 1, 0 ≤ × ≤ 7, V(AVSS) ≤ VP6.x/Ax ≤ V(AVCC) 0 VAVCC V IADC12 Operating supply current into AVCC terminal (3) fADC12CLK = 5 MHz, ADC12ON = 1, REFON = 0, SHT0 = 0, SHT1 = 0, ADC12DIV = 0 2.2 V 0.65 0.8 mA 3 V 0.8 1 IREF+ Operating supply current into AVCC terminal (4) fADC12CLK = 5 MHz, ADC12ON = 0, REFON = 1, REF2_5V = 1 3 V 0.5 0.7 mA fADC12CLK = 5 MHz, ADC12ON = 0, REFON = 1, REF2_5V = 0 2.2 V 0.5 0.7 3 V 0.5 0.7 CI Input capacitance(5) Only one terminal can be selected at one time, P6.x/Ax 2.2 V 40 pF RI Input MUX ON resistance(5) 0 V ≤ VAx ≤ VAVCC 3 V 2000 Ω (1) The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, CI, is also the dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the recommendations on analog-source impedance to allow the charge to settle for 12-bit accuracy. (2) The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced accuracy requirements. (3) The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced accuracy requirements. (4) The accuracy limits minimum external differential reference voltage. Lower differential reference voltage levels may be applied with reduced accuracy requirements. 5.44 12-Bit ADC External Reference (1) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN MAX UNIT VeREF+ Positive external reference voltage input VeREF+ > VREF-/VeREF- (2) 1.4 VAVCC V VREF-/VeREF- Negative external reference voltage input VeREF+ > VREF-/VeREF- (3) 0 1.2 V (VeREF+ – VREF- /VeREF-) Differential external reference voltage input VeREF+ > VREF-/VeREF- (4) 1.4 VAVCC V IVeREF+ Static leakage current 0 V ≤ VeREF+ ≤ VAVCC 2.2 V, 3 V ±1 µA IVREF-/VeREF- Static leakage current 0 V ≤ VeREF- ≤ VAVCC 2.2 V, 3 V ±1 µA |
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